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OMAP35x GPMC registers for bursts

laurent poyart
Prodigy 180 points

Hi,

I'm using a Mistral EVM Board with DM37x cpu. I use the expansion connector of the board to analyse GPMC bus activities with a logic analyser (nOE, nWE, GPMC CLK, D0-D15, ...). This connector is not linked to a device.

We plan to use a DM37x to connect it to FPGA, I would like to configure the GPMC bus on the EVM board to check that I can run it in burst mode. And I would like to analyse the signals with my analyser.

Does anybody has a GPMC configuration which allows to run in synchronous burst mode?

I've started to configure the registers but I not able to get burst work correctly. I use the SDMA to transfer my data but I get independant Chip Select activations.

Best regards.

Laurent

  • 0
    TI__Guru 65405 points

    Hi Laurent,

    Are you use the configuration settings for synchronous burst mode from the TRM sections 10.1.5 GPMC Basic programming model and timing parameters as 10.1.6.1.2.1 GPMC Configuration for Synchronous Burst Read Access?

    BR

    Tsvetolin Shulev

  • 0 in reply to Cvetolin Shulev-XID
    Prodigy 180 points

    Hi,

    yes I had a look at the documentation. I have applied the following rules:

    • Type of device = NOR/SRAM
    • Read and Write in synchronous mode
    • Wait PIN is not used
    • CLK = FCLK / 4 so I applied the following rules on parameters:
      • CLKACTIVATIONTIME = 0
      • RDACCESSTIME & WRACCESSTIME = 8
      • RDCYCLETIME & WRCYCLETIME = multiple of 4
      • RDCYCLETIME  >= RDACCESSTIME + 2 (idem for WR)
      • RDCYCLETIME >= all off times (idem for WR)
      • PAGEBURSTACCESSTIME = multiple of 4

    Please find below my GPMC & SDMA registers configuration:

    GPMC_CONFIG1_i_1 = 0x78001003
        WRAPBURST = 0x0
        READMULTIPLE = 0x1
        READTYPE = 0x1
        WRITEMULTIPLE = 0x1
        WRITETYPE = 0x1
        CLKACTIVATIONTIME = 0x0
        ATTACHEDDEVICEPAGELENGTH = 0x0
        WAITREADMONITORING = 0x0
        WAITWRITEMONITORING = 0x0
        RESERVED = 0x0
        WAITMONITORINGTIME = 0x0
        WAITPINSELECT = 0x0
        RESERVED = 0x0
        DEVICESIZE = 0x1
        DEVICETYPE = 0x0
        MUXADDDATA = 0x0
        RESERVED = 0x0
        TIMEPARAGRANULARITY = 0x0
        RESERVED = 0x0
        GPMCFCLKDIVIDER = 0x3        // divide FCLK by 4

    GPMC_CONFIG2_i_1 = 0x000A0A00
        RESERVED = 0x0
        CSWROFFTIME = 0xa
        RESERVED = 0x0
        CSRDOFFTIME = 0xa
        CSEXTRADELAY = 0x0
        RESERVED = 0x0
        CSONTIME = 0x0


    GPMC_CONFIG3_i_1 = 0x000A0A00
        RESERVED = 0x0
        ADVWROFFTIME = 0xa
        RESERVED = 0x0
        ADVRDOFFTIME = 0xa
        ADVEXTRADELAY = 0x0
        RESERVED = 0x0
        ADVONTIME = 0x0


    GPMC_CONFIG4_i_1 = 0x0A010A01
        RESERVED = 0x0
        WEOFFTIME = 0xa
        WEEXTRADELAY = 0x0
        RESERVED = 0x0
        WEONTIME = 0x1
        RESERVED = 0x0
        OEOFFTIME = 0xa
        OEEXTRADELAY = 0x0
        RESERVED = 0x0
        OEONTIME = 0x1


    GPMC_CONFIG5_i_1 = 0x04081010
        RESERVED = 0x0
        PAGEBURSTACCESSTIME = 0x4        // multiple of 4
        RESERVED = 0x0
        RDACCESSTIME = 0x8            // multiple of 4
        RESERVED = 0x0
        WRCYCLETIME = 0x10            // multiple of 4
        RESERVED = 0x0
        RDCYCLETIME = 0x10            // multiple of 4

    GPMC_CONFIG6_i_1 = 0x080F0000
        RESERVED = 0x0
        RESERVED = 0x0
        WRACCESSTIME = 0x8            // multiple of 4
        RESERVED = 0x0
        WRDATAONADMUXBUS = 0xf    
        RESERVED = 0x0
        CYCLE2CYCLEDELAY = 0x0
        CYCLE2CYCLESAMECSEN = 0x0
        CYCLE2CYCLEDIFFCSEN = 0x0
        RESERVED = 0x0
        BUSTURNAROUND = 0x0


    GPMC_CONFIG7_i_1 = 0x00000860
        RESERVED = 0x0
        MASKADDRESS = 0x8
        RESERVED = 0x0
        CSVALID = 0x1
        BASEADDRESS = 0x20


    DMA4_CICRi_0 = 0x00002F28
        RESERVED = 0x0
        RESERVED = 0x1
        DRAIN_IE = 0x0
        MISALIGNED_ERR_IE = 0x1
        SUPERVISOR_ERR_IE = 0x1
        RESERVED = 0x1
        TRANS_ERR_IE = 0x1
        PKT_IE = 0x0
        RESERVED = 0x0
        BLOCK_IE = 0x1
        LAST_IE = 0x0
        FRAME_IE = 0x1
        HALF_IE = 0x0
        DROP_IE = 0x0
        RESERVED = 0x0

    DMA4_CSDPi_0 = 0x000260C1
        RESERVED = 0x0
        SRC_ENDIAN = 0x0
        SRC_ENDIAN_LOCK = 0x0
        DST_ENDIAN = 0x0
        DST_ENDIAN_LOCK = 0x0
        WRITE_MODE = 0x2
        DST_BURST_EN = 0x1
        DST_PACKED = 0x1
        RESERVED = 0x0
        SRC_BURST_EN = 0x1
        SRC_PACKED = 0x1
        RESERVED = 0x0
        DATA_TYPE = 0x1

    DMA4_CENi_0 = 0x00000008
        RESERVED = 0x0
        CHANNEL_ELMNT_NBR = 0x8

    DMA4_CFNi_0 = 0x00000001
        RESERVED = 0x0
        CHANNEL_FRAME_NBR = 0x1

    DMA4_CSSAi_0 = 0x40200000
        SRC_START_ADRS = 0x40200000

    DMA4_CDSAi_0 = 0x20000000
        DST_START_ADRS = 0x20000000

    DMA4_CSEi_0 = 0x00000001
        RESERVED = 0x0
        CHANNEL_SRC_ELMNT_INDEX = 0x1

    DMA4_CSFi_0 = 0x00000001
        CH_SRC_FRM_INDEX_OR_16BIT_PKT_ELNT_NBR = 0x1
    DMA4_CDEi_0 = 0x00000001
        RESERVED = 0x0
        CHANNEL_DST_ELMNT_INDEX = 0x1

    DMA4_CDFi_0 = 0x00000000
        CH_DST_FRM_IDX_OR_16BIT_PKT_ELNT_NBR = 0x0

    I run a write access burst but I get as many Chip Select changes has 16bits words I'm writing (see the screen capture).

    Regards,

    Laurent