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uPP
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  • Forum Post: Re: OMAP-L138 uPP DMA

    Joe Coombs
    Joe, Are you using the uPP BIOS driver , or are you using your own low-level code to program the peripheral? If you're using your own code, please check to make sure that you are following the steps (in order) specified in the user guide. Also, how often do you see false start and enable pulses...
    on Jan 5, 2010

  • Forum Post: Re: OMAP-L138 uPP DSP/BIOS driver v10 problem in transmit mode

    Joe Coombs
    Michael, Are you using the "test" application that comes with the uPP driver? If so, I would encourage you to try out the digital loopback (dlb) mode first with all of the default settings. Then, if that test passes, you can try changing settings and running in different modes. Also,...
    on Jan 13, 2010

  • Forum Post: Re: OMAP-L138 uPP DSP/BIOS driver v10 problem in transmit mode

    Michael Schlenker39475
    Joe, thanks for your quick response! Yes I'm using the "upp_drv_test" application. I just ran the DLB mode this moring and it worked fine. Then I changed the mode to transmit and it got stuck at the same line of the code. Nothing was connected to the connector of the uPP at this...
    on Jan 15, 2010

  • Forum Post: Re: OMAP-L138 uPP DSP/BIOS driver v10 problem in transmit mode

    Joe Coombs
    Michael, If it's working intermittently, your problem is probably on the hardware side. Here are some possible "gotchas" to watch out for: Check the DIP switch settings on your board. There's at least one DIP switch that needs to be set to ensure that all of the uPP signals...
    on Jan 15, 2010

  • Forum Post: Re: OMAP-L138 uPP DSP/BIOS driver v10 problem in transmit mode

    Michael Schlenker39475
    Joe, the problem was definately the floating WAIT pin. Just connected it to ground on my little adapter baord and finally the transfer always works fine! Thank you for your help! Michael
    on Jan 18, 2010

  • Forum Post: Re: OMAP-L138 uPP DMA

    Joe Coombs
    I took another look at this while I was running some other uPP tests, and I found what may have caused the appearance of false enable/start pulses. If the uPP pinmux is applied before the peripheral is enabled (i.e. when UPPCR.EN = 0), the control signals either drive or float high. When the peripheral...
    on Feb 3, 2010

  • Forum Post: OMAPL138 UPP UPICR change during active transfer

    Hunter Leland
    I would like to program back to back (i.e. continuous) receive transfers where the first transfer honors the start signal (STARTB=1) and the second ignores the START signal. Is this possible?
    on Feb 8, 2010

  • Forum Post: OMAPL138 UPP Port

    Joe Tijerina
    I'm reading the UPP User's Guide, section 3.5, Table 15, WAITA and WAITB descriptions. From the description of the WAITA and WAITB bit fields, I understand that the WAIT signal is only supported on Transmit mode (OMAP transmitting data) and that on receive mode the wait signal is always driven...
    on Feb 9, 2010

  • Forum Post: Re: OMAPL138 UPP Port

    Joe Coombs
    Joe, The WAIT signal allows the receiving device to request a pause in the current transmission. However, the uPP peripheral doesn't allow the CPU to arbitrarily assert WAIT when you are operating in receive mode. The only time that WAIT is asserted is when the peripheral is halted by emulation...
    on Feb 10, 2010

  • Forum Post: OMAPL138 UPP Control Registers

    Joe Tijerina
    I'm trying to read and write the UPP control registers from the ARM side with a Linux Device Driver but I'm unable to do so. I was read and write the SYSCFG0, GPIO, and SPI control registers just fine but for some reason I'm unable to do so with the UPP. Even when reading the first register...
    on Feb 25, 2010

  • Forum Post: L138 uPP ID Reg

    Jrvanho
    Does anyone else see 0x4423 1 100 in the ID register of uPP instead of the value stated in the user's guide 0x4423 0 100 ?
    on Mar 22, 2010

  • Forum Post: Re: UPP Transmit DMA stall

    Joe Coombs
    Hunter, Let me make sure that I understand the sequence of events: Start by programming 2 transfers (one active, one pending) In the ISR, program another transfer if PEND allows it This works fine for N transfers Transfer N + 1is programmed but fails to start Writing 0 to UPID2 ...
    on Mar 24, 2010

  • Forum Post: Re: UPP

    Joe Coombs
    Chris, That driver comes with an example app that you can easily modify for your purposes. You just need to take one of the "loopback" modes and modify it to not use internal/digital loopback (or DLB). After that, the only thing you need to worry about is how to connect to the FPGA. The...
    on Mar 24, 2010

  • Forum Post: Re: UPP Transmit DMA stall

    Joe Coombs
    Brad's suggestion to change HWI priorities such that nothing pre-empts uPP interrupts is a good idea. Also, you should definitely structure your uPP ISR in the form of a loop so that you catch multiple events if they happen before you can return from the ISR. (There's an example ISR function...
    on Mar 24, 2010

  • Forum Post: OMAPL138 UPP init sequence

    Marc48067
    In chapter 2.6.1 of sprugj5 it is mentioned that after setting the SWRST bit in UPPCR to 1 we have to wait at least 200 device clock cycles before resetting the bit again. What is meant by device clock cycles? Is this the upp clock (150MHZ), the cpu clock (300MHZ) or the oscillator clock (24MHZ)? ...
    on May 10, 2010

  • Forum Post: Re: OMAO-L138 - Upp, EOL

    Joe Coombs
    Mariana, You may "miss" one or more EOL events when using a very small line size and very fast uPP clock. The recommended ISR structure is meant to avoid missing interrupts, but it can fail if you have rapidly repeating interrupts of the same type. The only interrupt that is likely to "fire"...
    on Jul 9, 2010

  • Forum Post: OMAP-L138 and UPP

    Alexey Tsirlin
    Hi. I have a question regarding queued DMA parameters in UPP. During normal UPP operation, it has active and queued DMA parameters. Is there a way to update queued parameters while UPP is running on active parameters? Thanks, Alexey.
    on Jul 15, 2010

  • Forum Post: Re: OMAP-L138 and UPP

    Joe Coombs
    Alexey, Unfortunately, the answer is no. If a transfer is already queued then it cannot be modified. Note that this only applies to a transfer that is "queued" in the sense that it has already been programmed into the DMA descriptor registers and will begin immediately when the current/active...
    on Jul 19, 2010

  • Forum Post: Upp sample code without DSPBIOS needed

    SATHYA MURTHY
    Hi, We are using TMS320C748 processor which will be connectd to FPGA .We have to use UPP for data transfer between FPGA and processor bidirectionaaly using single channel . One channel(Channel A) i will be using as Transmitter which will be connected to other processor .The other channel (Chan B)...
    on Aug 12, 2010

  • Forum Post: Re: Upp sample code without DSPBIOS needed

    SATHYA MURTHY
    Hi Mariana, Thanks for your reply .I will check the link provided by you. Thanks & Regards Sathya
    on Aug 16, 2010

  • Forum Post: Re: Upp sample code without DSPBIOS needed

    SATHYA MURTHY
    Hi Jeff, Thanks for your timely response ,I will be using Channel A as Transmitter and Channel B as Receiver. Thanks & Regards Sathya
    on Aug 16, 2010

  • Forum Post: How to setup interrupt for upp Peripheral for TMS320C6478

    SATHYA MURTHY
    Hi, Please let me know how to register interrupt service routine for upp peripheral without using DSP BIOS . .I am using TMS320C6478 processor . If any cod eis available please share ity. its very urgent . If any sample code for upp data transfer without using DSP BIOS is greatly helpful. ...
    on Aug 25, 2010

  • Forum Post: OMAPL-138 + Spartan 6

    C. Grispino
    Is there any TI sponsored documentation on the Avnet product which combines the Spartan6 and OMAPL-138 into a co-processing evaluation board ? I'm especially looking for items related to the how the uPP is used in conjunction with DMA to memory map the OMAP space to the FPGA space. Anyone out there...
    on Dec 10, 2010

  • Forum Post: Accessing the UPP (Parallel port) from the DSP side of the L138

    David Nizel
    (Please direct to Tim H. Customer request from Ft. Lauderdale. Thank you. -DN) Could help me find sample code that accesses the UPP (Parallel port) from the DSP side of the L138? Ideally if we can find code that uses or can be converted to take advantage of the C6Run or C6APP arm-dsp software interface...
    on Feb 18, 2011

  • Forum Post: Re: Accessing the UPP (Parallel port) from the DSP side of the L138

    Joe Coombs
    David, It's certainly possible to access the uPP from the DSP side. We have actually created two DSP/BIOS drivers for uPP: A stand-alone uPP driver that is available on the embedded processors wiki site A PSP driver that is included with the standard DSP/BIOS PSP release for OMAP-L138...
    on Feb 18, 2011
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