Digital Signal Processors (DSP)

Forum Post: RE: How to configure TIM4_OUT for PWM on a DM816x EVM ?

iHunks Huang — Sat, 25 May 2013 08:10:00 GMT

Hi Ed Sutton.

I also want to control LCD brightness using a PWM signal , but my PWM signal is from TIM7_OUT GP0[31].

I want to ask you how can I make the GP0[31] associate with the TIM7_OUT?

I am look forward to your reply.

Regards,

iHunks.

Forum Post: RE: Recompiling kernel with TI8148 PSP

Mike Thornhill — Sat, 25 May 2013 07:23:00 GMT

1.) The issue that I was having was the error being generated about "cc1". This was not in my path and once it was I was able to compile the uImage.

2.) I have been following this guide to rebuild the kernel with the updated PSP.

http://processors.wiki.ti.com/index.php/TI81XX_PSP_User_Guide#Boot_from_SD_Card

Now when I boot the kernel I receive:

<...>

syslink: disagrees about version of symbol module_layout

FATAL: Error inserting syslink (/lib/modules/2.6.37/kernel/drivers/dsp/syslink.ko): Invalid module format

I don’t see a step here in the guide to update the kernel objects such as syslink.ko and cmemk.ko.

What am I missing here?

-Mike

Forum Post: RE: Why the uboot show DRAM: 2GIB

enson Steven — Sat, 25 May 2013 04:17:00 GMT

Pavel,

I have tried change the mode of display,

root@dm814x-evm: cd /usr/share/ti/ti-media-controller-utils
root@dm814x-evm: ./change_display.sh hdmi
root@dm814x-evm: reboot

But I think It changed nothing.when I reboot the board,it still load the pvrsrvkm.ko bufferclass_ti.ko,

and I do

root@dm814x-evm: /etc/init.d/matrix-gui-e stop
root@dm814x-evm: /etc/init.d/pvr-init stop
root@dm814x-evm:/usr/share/ti/ti-omx# ./decode_display_a8host_debug.xv5T -i /usr/share/ti/data/videos/dm816x_1080p_demo.264 -w 1920 -h 1080 -f 60 -g 0 -d 0 -c
h264

I try many times,only one time,the screen appeared the video 2 seconds.I also try other demos

root@dm814x-evm:./display_a8host_debug.xv5T -d 0

It's running status by random,sometimes show the picture,sometimes the screen showed "no data input".

Is't caused by the memory map?I am very confused.

Best Regards,

Enson

Forum Post: RE: Help a example in DM642

bang le — Sat, 25 May 2013 03:16:00 GMT

please help me !!! :((((

Forum Post: TMS320C6x Evaluation Module

Reza Zolhayat — Sat, 25 May 2013 01:48:00 GMT

Hello,

I have just purchased TMS320C66x Evaluation Module and install DVD including code composer version

5.2.1.00018.

I followed all instruction inside the READ_ME file to install it properly.

Now, once I attempt to debug it says licence expired or I am using Unlicensed program.

Could you tell me what i should do?

Thank You.

Reza Zolhayat,P.Eng.

Forum Post: RE: c6457 Mcbsp used as SPI doubt

yue zhang2 — Sat, 25 May 2013 00:45:00 GMT

RandyP

my TMS320SEVM6457 was producted by einfochip company, and there was a CD in the box which contant the CSL of the board. in the CSL example i cannot find the exactly SPI code, but there are three example of MCBSP which show as follow picture, and i refer to the single channel code because i only need single channel, but i only use some of the code like

CSL_mcbspHwControl (hMcbsp, CSL_MCBSP_CMD_RESET_CONTROL, &ctrlMask);

and the fuction of CSL_mcbspHwSetupRaw (hMcbsp, &MyConfig) from the very begining is write by myself. the while(1) is also write by myself, all i want to do is keep the spi in the dead loop which it can always transmit the code writen in the CSL_mcbspWrite() and i can get continual behavior. as i said, when i close the GRST, i can get proper behavior on the OSC, but when i set GRST as 1, i get nothing. i wonder if you can check the register is configured right or not in my code?

hope for your reply!

Regards,

zhang

Forum Post: RE: Connection failed in one K2X EVM plus one C6678 EVM case

RandyP — Fri, 24 May 2013 23:37:00 GMT

Rahul,

I tried this on my boards and had the same problem.

I noticed that when using just the C6678 LE mezzanine emulator, the following was reported during a Test Connection:

This utility has selected a 560/2xx-class product.
This utility will load the program 'bh560v2u.out'.

When using just the EVMTCIK2X onboard XDS2xx emulator, the following was reported during a Test Connection:

This utility has selected a 560/2xx-class product.
This utility will load the program 'xds2xxu.out'.

When I created a Target Configuration with both emulators, if I select either one of the emulators and try the Test Connection, the printout will show the program name for the one that is listed first in the TC. And the TC cannot be loaded, giving an error:

It first goes through the process of loading all the components of the first emulator, and then throws this error when it moves to the second emulator.

Should we move this to the CCS Forum for emulation support?

@ Thomas, @ Rahul,

I tried another test, and was able to open one CCSv5 window for the EVMK2X and a second CCSv5 window for the EVM6678. I was able to connect to both EVMs and was able to connect to the first DSP CorePac of each.

Regards,
RandyP

Forum Post: RE: srio 8bit deviceID problem

tscheck — Fri, 24 May 2013 23:28:00 GMT

Are you still having the issue? If it would be helpful, we can send an SRIO DSP example that works in loopback with 8b IDs. Then you know the configuration of the DSP is correct and you can debug on the FPGA side. Let us know.

Regards,

Travis

Forum Post: RE: the question on size of linking RAM

John Dowdal — Fri, 24 May 2013 23:24:00 GMT

For internal linking RAM, the size in bytes is hidden from you. The LLD always takes the size in descriptor entries, and if you set linkingRAM0Size to 0 (and linkingRAM0Base to 0) it will fully configure the internal linking RAM which supports 16K entries on K1.

K2 is a little more confusing. Since there are two separate QMs normally operated in joint mode, it uses twice the linking RAM. Each QM gets its own. Thus you still only support 16K descriptors in internal linking RAM in joint mode.

The only time the *4 comes into play is if you want to "malloc" the memory for external linking RAM. Otherwise, think number of descriptors.

Forum Post: RE: USB problems when booting from flash

DanB — Fri, 24 May 2013 23:15:00 GMT

I was finally able to get this running properly. Writing to PCGCR1/PCGCR2 to activate all the clocks ensured that the USBCDC would enumerate on the host.

Forum Post: RE: C6678 Configuration Bus Issues

tscheck — Fri, 24 May 2013 23:14:00 GMT

I think we are going to need your code, or simplified version, to try to duplicate on the EVM. I'm not sure how to move forward beyond that. I've discussed the issue with a number for folks, and haven't come up with anything.

I don't like leaving things open-ended, but I'm assuming you will be moving forward with rev2.0 silicon correct? That is still not exhibiting any issues I assume.

Regards,

Travis

Forum Post: RE: Error connecting to the target

Vasantha — Fri, 24 May 2013 22:52:00 GMT

Hello Albert,

Did you try CPU reset / power cycle the EVM. Can you try doing this and let us know.

Regards

Vasanth

Forum Post: L138: No external XDS560 Trace for both ARM/DSP?

Paul Singh — Fri, 24 May 2013 22:33:00 GMT

Hi,

When I was configuring CCS ≫ Tools ≫ Trace Control, I found among the five options “ETB, 560 V2 Trace, 560 Trace Pod, Pro Trace, None”:

ARM could only select ETB or None
C674X could only select “None”

as shown in the screenshot below:

I further checked “Table 5-145. DSP Debug Features” and “Table 5-146. ARM Debug Features” in SPRS586C and found

ARM has only ETB/ETM, but no ability to transfer CPU information to an external receiver like XDS560 Trace
DSP has only AET, no ETB, no ability to interface with XDS560 Trace

Am I correct with these observations?

And I guess the best I can use for the two cores are:

ARM: ETB
DSP: AET

Paul

Forum Post: RE: Why UBL can find valid magicnum 0xA1ACED66, but can not find valid uboot image?

Ivy Liu — Fri, 24 May 2013 22:29:00 GMT

Hi Ivan,

Thank you very much for the reply.

I am now doing the DDR test, I will let you know the result later.

Sorry, I think I made a mistake before.

The ubl image in the nand is same as the original one, but the Uboot image in the NAND has 1 bit difference from the original one.

I think it is this 1 bit cause the "Can not find valid boot image" problem.

But I do not know why DM365 does not correct this 1 bit error in UBL, the hardware 4-bit ECC is enabled in UBL.

Do you have any suggestion?

Thanks and Best Regards,

Ivy

Forum Post: RE: C5505 ADC error count

Vasantha — Fri, 24 May 2013 22:11:00 GMT

Is there any noise observed on your external reference voltage.

Is it possible to share the oscilloscope snapshot of the external reference voltage that is being supplied to SAR.

Just to update you, we are looking in to this issue, the above updates from you will be helpful.

Regards

Vasanth

Forum Post: RE: SPI’s CSDEF bits

Paul Singh — Fri, 24 May 2013 22:07:00 GMT

Antony,

Good to know that the TRM is correct and it is only a CCS display issue. Thanks for confirmation.

Paul

Forum Post: RE: Proper Way to Benchmark Timing within OpenMP on C6678

Ryan Radjabi — Fri, 24 May 2013 21:48:00 GMT

That didn't help me. How do I load your platform settings? Also, what is the procedure for loading these settings and applying them? Do I need to terminate and reload my target configuration? I've tried that, but didn't produce different results.

Ryan

Forum Post: RE: BAR0 not visible from RC

aymeric dupont — Fri, 24 May 2013 21:44:00 GMT

Hi Eric,

For a while you gave us big hopes. I sent you the update to our code privately following your recommendations.

The result is that it does not make any change. The situation is exactly the same as it was before.

I sent you another file privately which is the revised version of c66xinit.c to run our initialization inside TI IBL.I just want to make sure we are on the same page.

I have to say that the result are quite not what I was expecting. With our code, BAR0 is not available (we already knew that), but the windows are also not the size I am setting them up.

(Please visit the site to view this file)(Please visit the site to view this file)

By the way, I would like to remind you that we are working on the C6670 and perhaps this is what is making the difference.

Aymeric

Forum Post: RE: dvrrdk capture image

Badri Narayanan — Fri, 24 May 2013 21:20:00 GMT

Yes such a chain will work. But it will result in a lot of capture frame drop as writing video frame to a file will take much longer than capture frame duration.

Forum Post: RE: TMS320DM8168 VME Interface

Hyun Kim — Fri, 24 May 2013 20:38:00 GMT

Hi,

DM8168 does not support VME bus connection.

Regards,

Hyun