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Digital Signal Processors (DSP)

Welcome to the Digital Signal Processors (DSP) Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

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C6657
  • BOOT ROM
  • bootloader
  • c6455
  • C6655
  • c6670
  • c6678
  • c66x
  • DDR
  • edma3
  • FPGA
  • HyperLink
  • McBSP
  • mcsdk
  • multicore
  • PCIe
  • pdk
  • Ping-pong
  • re-enter
  • SRIO
  • SRIO_LoopbackDIOIsrexampleproject
  • Srio_start
  • TMDXEVMPCI
  • UPP
Related Posts
  • Forum Post: can PCIe be used to map interface registers for UPP (universal parallel bus) to host using C6657?

    Weichun Yuan Weichun Yuan
    we are using a host and several C6657 DSPs in our system. For routing reasons, is it possible that we can use PCIe to map the UPP registers through DSP to the host so that the host do not have to directly connect to the parallel devices? Is this possible and is there any down side of doing this?
    on May 22, 2012
  • Blog Post: BIOS-MCSDK 2.0.9: Maintenance update for C66x BIOS-MCSDK + C6657 support

    Raj Sivarajan Raj Sivarajan
    BIOS MCSDK 2.0.9 is available for download ; this is a maintenance update for the production R2.0.0 release. This update can be manually downloaded or automatically downloaded directly from CCS using Eclipse Update Manager; see the BIOS MCSDK User's Guide for details on setting up automatic software...
    on Jun 12, 2012
  • Blog Post: BIOS-MCSDK 2.1.0 Beta Available for C66x DSP OpenMP Support

    Raj Sivarajan Raj Sivarajan
    BIOS MCSDK 2.1.0 Beta is available for download . This release introduces OpenMP support for TMS320C6678. Note that this is a beta quality release; for the production quality release of C66X, see BIOS-MCSDK 2.0.9 . The major updates from the baseline release, BIOS MCSDK 2.0.9, are: OpenMP runtime...
    on Jun 30, 2012
  • Forum Post: C6657 EVM Serial Flash

    Rob Gillis Rob Gillis
    I noticed on the evaluation board schematic it says that you are using a 16MB SPI NOR FLASH yet when looking up the part number N25Q032, this refers to 32 Mbit flash. Please confirm what the actual flash is on the evaluation board.
    on Jul 18, 2012
  • Blog Post: Integre Technologies Announces HyperLink DSP Interface FPGA Core

    Chad Courtney Chad Courtney
    Integre Technologies ( http:/ www. integre tek.com/ ) has announced the release of the IP-HyperLink high speed digital signal processor (DSP) interface core for both Altera and Xilinx device families. The announcement can be found here http://www.prweb.com/releases/2012/6/prweb9643885.htm Details...
    on Jul 19, 2012
  • Forum Post: TMDXEVMPCI and C6657 EVM - has this been tested? general questions.

    Marc DAmato Marc DAmato
    Team, Has the TMDXEVMPCI been tested with C6657 EVM? Does the board get its power from AMC connector or does it need separate Power Supply? Thanks.
    on Jul 23, 2012
  • Blog Post: BIOS-MCSDK 2.1.0: OpenMP for C66x Multicore DSP

    Raj Sivarajan Raj Sivarajan
    The production release of BIOS-MCSDK 2.1 is available for download . This release introduces OpenMP as a multicore programming methodology for TMS320C6678 and TMS320C6670. This release can be manually downloaded or automatically downloaded directly from CCS using Eclipse Update Manager; see the BIOS...
    on Sep 6, 2012
  • Forum Post: image processing demo for evmc6657l

    Yang Beck Yang Beck
    Hi all, I buy a evmc6657l and want to find a image processing demo. I only can find image processing demo for c6670/c6678 and I found that ipc_1_24_03_32 is compatible for C6657, can I get a image processing demo for evmc6657l? Thanks!
    on Sep 24, 2012
  • Blog Post: BIOS-MCSDK 2.1.1: Maintenance update for C66x BIOS-MCSDK

    Raj Sivarajan Raj Sivarajan
    BIOS MCSDK 2.1.1 is available for download ; this is a maintenance update for the production R2.1.0 release. This update can be manually downloaded or automatically downloaded directly from CCS using Eclipse Update Manager; see the BIOS MCSDK User's Guide for details on setting up automatic software...
    on Oct 6, 2012
  • Blog Post: BIOS-MCSDK 2.1.2: Maintenance update for C66x BIOS-MCSDK

    Raj Sivarajan Raj Sivarajan
    BIOS MCSDK 2.1.2 is available for download ; this is a maintenance update for the production R2.1.0 release. This update can be manually downloaded or automatically downloaded directly from CCS using Eclipse Update Manager; see the BIOS MCSDK User's Guide for details on setting up automatic software...
    on Nov 13, 2012
  • Blog Post: BIOS-MCSDK 2.1.2: Maintenance update for C66x BIOS-MCSDK

    Raj Sivarajan Raj Sivarajan
    BIOS MCSDK 2.1.2 is available for download ; this is a maintenance update for the production R2.1.0 release. This update can be manually downloaded or automatically downloaded directly from CCS using Eclipse Update Manager; see the BIOS MCSDK User's Guide for details on setting up automatic software...
    on Nov 13, 2012
  • Forum Post: Slow instruction execution on C6657 EVM

    Yang Beck Yang Beck
    Hi all, I use CCS 5.2 with EVM6657L. I turn on the clock profiling tool(Run -> Clock) and in disassembly window I found that even if a "NOP" cpu instruction, it takes 6 cpu cycle for execution. Some situation with no optimization and -O3 So the overall execution time of my application...
    on Nov 22, 2012
  • Forum Post: RE: PLL register status on C6657 devices

    Weichun Yuan Weichun Yuan
    Thanks a lot, Chad, for your reminding, I'll pay more attention on the things I add. I understand that the reserved bits usually are not exposed to us. As I saw that there are some differences between those reserved bits related to DDR config, I just wonder if it could give us some hints, why the...
    on Jan 22, 2013
  • Forum Post: RE: Power comsumption chart for C6655

    SNBANIK SNBANIK
    Is the power consumption summary for c6655 available yet? I couldn't find it in the product page. I am also interested in power consumption ratio of c6657 versus c6455 and c6655 versus c6455 (@ 1GHz) Regards, Somnath Banik
    on Feb 6, 2013
  • Forum Post: C6657 PCIe rom boot code not jump to _c_int00

    Weichun Yuan Weichun Yuan
    we are trying to use PCIe to boot our own board (not using EVM). The PCIe on dsp is configured as EP and host has configured the PCIe registers on C6657 and downloaded the code to L2 of core 0. Host also wrote the entry address _c_int00 into BOOT_MAGIC 0x8FFFFC, but the global variable I set in main...
    on Mar 8, 2013
  • Forum Post: Problems with McBSP Digital Loopback example

    Leonardo Trierveiler Leonardo Trierveiler
    Less than a month ago I started working with the TMS320C6657 EVM due to my interest in the ECU package from VoLIB. After making some tests, now I want to configure the McBSP and EDMA3 to connect with a custom board so I can run more tests with the ECU using part of our hardware. So I started reading...
    on Mar 13, 2013
  • Forum Post: RE: C6657 PCIe rom boot code not jump to _c_int00

    Weichun Yuan Weichun Yuan
    Thank you, Eric, for the clarification. Sending a MSI triggers the DSP to jump to my dsp bootstrapping code and solved my problem. After I push code, write BOOT_MAGIC and send MSI to dsp to start my bootstrap code to init DDR and some peripherials, can I jump back to ROM BOOTLOADER so that I can use...
    on Mar 15, 2013
  • Forum Post: Problem with McBSP + EDMA with Ping-Pong buffers

    Leonardo Trierveiler Leonardo Trierveiler
    I'm using the evaluation module TMS320C6657 and I'm trying to receive external data from a custom board. I alredy configured the McBSP port correctly (I believe) and now I need to receive the data continuously, so I started configuring the EDMA in Ping-Pong mode. I need to receive 32 samples...
    on Apr 17, 2013
  • Forum Post: some advise for SRIO

    Ralph Geraeds Ralph Geraeds
    Hello, I am trying to setup a SRIO connection between a FPGA and c6657.I am new to this. If I look at the examples in 'KeyStone Architecture Serial Rapid IO" there are 2 ways to configure the srio in KeyStone Architecture: "Channel Operation" and "Queue Operation" (Is this...
    on May 8, 2013
  • Forum Post: problem wint Srio_start in SRIO_LoopbackDIOIsrexampleproject on C6657

    Ralph Geraeds Ralph Geraeds
    Dear support, I am trying to run SRIO_LoopbackDIOIsrexampleproject from pdk_C6657_1_1_2_6. I got it compiling and running. However, the folowing problem occures: Both cores always run intil the LLD function 'Srio_start '. If all the initialization of SRIO, QMSS.. is done on core 0 (CORE_SYS_INIT...
    on May 21, 2013
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