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bootloader
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  • Forum Post: Re: c672x bootloader + I2C EEPROM Secondary Bootloader

    Brad Griffis
    rsp 1. The primary bootloader (in ROM of C672x) copies only 1024 bytes from any chosen external source, i.e. I2C, SPI, Asynchronous.. Memories. Please see the app note "Using the TMS320C672x Bootloader" found in the product folder. http://focus.ti.com/docs/prod/folders/print/tms320c6727b.html...
    on Jun 12, 2008

  • Forum Post: Perl version to run C672x Bootloader Utilities

    Mariana
    The scripts used by the document SPRAA69C were tested with Perl release 5.8.4 and the script genBootCfg requires the Tk module installed. One of the most popular Perl packages available for Windows is ActivePerl and is provided by a company called ActiveState. ActivePerl releases 5.8.x include the...
    on Jun 17, 2008

  • Forum Post: Re: C672x Flash burn utility needed

    TimHarron
    *edited post* Let me try this again. Apparently my mind was switched off for a little while! Traditionally we have used a software package called FlashBurn from a company called Software Design Solutions ( www.softwaredesignsolutions.com ) to burn an on-board Flash on our DSKs and/or EVMs. The C672x...
    on Jun 27, 2008

  • Forum Post: Re: C672x Flash access problem

    C. Olson
    Most code examples I have come across are for dev kits based on the 6727, which are using CPLD's or FPGA's for controlling the upper address lines to the async memory devices. We have a C6726 (tqfp) custom board with a 16-bit 29F800 flash. Using SPRRS370B (Fig4-5) and SRU711B (Fig2-8b and Fig2...
    on Jul 10, 2008

  • Forum Post: Re: C672x Flash access problem

    C. Olson
    ...continuing along with the example above (which was extremely helpful, thanks)...but now focusing on the secondary bootloader process. Since GPIO are required for addresses above 0x90001FFF, I assume this is what TI is referring to as a "page boundary". When the AIS data stream is created...
    on Jul 15, 2008

  • Forum Post: Re: C672x Flash access problem

    Daniel Allred
    I'm confused as to where you got the page size of 0x2000 from. On a C6727 device, there will be 15 address lines (EM_A[12..0] and EM_BA[1..0]) available when accessingan 8-bit ASYNC memory, 14 address lines (EM_A[12..0] and EM_BA[1]) when accessing a 16-bit device, etc. This leads to page sizes of...
    on Jul 16, 2008

  • Forum Post: Re: C672x Flash access problem

    C. Olson
    We are using a C6726 (tqfp) with a 16-bit 29F800 flash attached (as suggested in SRU711B Fig2-8b) where A11..A0,BA1 (DSP) are attached to A12..A0 (FLASH), respectively. Since we are using a 16-bit data bus, BA1 is always "0" (byte writes are inhibitied, so we are always accessing even address...
    on Jul 16, 2008

  • Forum Post: Re: C672x Flash access problem

    C. Olson
    I think we are talking about similar points, though I do stand corrected on the use of the BA1 pin. I have been focusing on the physical addressing of the FLASH device (2^13=>0x2000). However, this translates to an address of 0x90004000 on the C672x for FLASH using 16-bit data bus. (C672x software...
    on Jul 17, 2008

  • Forum Post: Re: burning flash for bootloader

    Brad Griffis
    This is likely due to the fact that 6727 has only 13 address lines. The secondary bootloader likely needs to utilize some GPIO to page through flash. There was lots of good discussion in this thread: https://community.ti.com/forums/t/78.aspx Brad
    on Aug 14, 2008

  • Forum Post: Re: C6727 : boot from prallel flash

    Brad Griffis
    So did you write your own assembly boot loader? Can you post it (at least the first bit)? How did you go about getting your code to start at 0x10000004?
    on Aug 20, 2008

  • Forum Post: Re: DM642 Reset

    Bernie Thompson TI
    The easiest way would be to have the device reset or power cycled if you have the hardware in place to do so, such as if you had an external watchdog timer and let it expire, or a master processor that could force a reset. With a device like the DM642 the secondary boot loader that brings in the rest...
    on Aug 28, 2008

  • Forum Post: Re: Flashburn checksum on DM648 EVM

    TimHarron
    Hello chris, For the benefit of others out there who may run into the same problems, would you mind elaborating what you did to correct this? A side benefit is that if there are issues with documentation surrounding the bootloader software we can push them to be fixed!
    on Sep 13, 2008

  • Forum Post: Re: Problem with Booting from Flash on DM648

    TimHarron
    I spent a bit of time working on the DM648 Bootloader this afternoon and managed to successfully get a DSP/BIOS-based project to bootload from Flash. Here are a couple key notes I took from this: - I rebuilt the UBL project (found in \flashutil\DM647_8\CCS\UBL) using my current CodeGen Tools (6.1.5)...
    on Oct 1, 2008

  • Forum Post: Re: C6727 : boot from prallel flash

    Brad Griffis
    Yes! Others have absolutely been successful in extending the address lines by using GPIO. Here was a good discussion we had earlier: https://community.ti.com/forums/t/78.aspx It started out discussing the flash programming, but later got into using the AIS boot mode. I recommend using the AIS bootmode...
    on Oct 7, 2008

  • Forum Post: Re: C6727 : boot from prallel flash

    Ashwin5763
    Thanks for this info. We will be soon getting the 6727 Evaluation boards. Our scheme will be to Boot from Parallel Flash and then transfer the code to SDRAM. This is the basic requirement for the secondary boot-loader which we are planning to implement. Is there any other boot-scheme which can suffice...
    on Oct 8, 2008

  • Forum Post: Re: C6727 : boot from prallel flash

    Brad Griffis
    TI has already written a secondary bootloader for these devices. That bootloader is permanently programmed into ROM on every c672x device TI ships. So although you have the option of writing your own secondary bootloader, I recommend you use the bootloader that's already built into the device. ...
    on Oct 8, 2008

  • Forum Post: Re: Problem: Corruption of the call stack while enabling cache

    Brad Griffis
    You need to follow the procedure for self-modifying code as listed in the Cache User's Guide (spru862): http://www.ti.com/lit/spru862 Specifically, Section 2.6 deals with this procedure. Here's an excerpt: 64x+ Cache User's Guide No coherence is maintained between L1D and L1P. That...
    on Oct 13, 2008

  • Forum Post: Re: Problem: Corruption of the call stack while enabling cache

    Elric
    Thank you, you are right. This solves the problem. The Setup_Cache() in the gel file is supposed to run at the very beginning, consequently invalidating the caches creates no problem. For the run-time, a writeback-invalidation should be used for L1D and L2.
    on Oct 14, 2008

  • Forum Post: Re: c6727 SPI slave boot mode problem

    TimHarron
    Harbour I think that it is time consuming and silly thing to investigate boot protocol of the leading TI DSP with zero documentation and useless support replies. You have to read http://daycounter.com/LabBook/TMS320/C6722_Tutorial.phtml - it is bright example of using your products. At he end of the...
    on Oct 16, 2008

  • Forum Post: Re: c672x bootloader + I2C EEPROM Secondary Bootloader

    TimHarron
    JieRui After DSP powered on,I have checked there are lost of bit on wavescope when I burned the AIS stream into I2CEEPROM.But the clock is very low about 7.83KHz.That's to say it only transmitte 700bytes per seconds.So how can we increase the speed. Please also be aware of Advisory 1.2.3 in the C6727B...
    on Oct 29, 2008

  • Forum Post: Re: C6727 : boot from prallel flash

    Ashwin5763
    In our applciation our executable code will be in FLASH which needs to be transfered to SDRAM at boot-up. So the program will run from SDRAM. Using the AIS will this be possible. We need to have Active PERL ver 5.8.4 for execution of AIS tools (e.g. genAIS.pl). Let us know if any version after 5.8.4...
    on Oct 30, 2008

  • Forum Post: Re: AIS booting on DM648 for flash(LH28F160BJE-TTL90)

    TimHarron
    Hi Geeta, I'm not sure I fully understand the nature of the problem you are facing. My first suggestion is to follow the suggestions found in another thread here (I know you posted there, but I still want to mention this as part of due diligence). There are some pretty important tips in my findings...
    on Nov 6, 2008

  • Forum Post: Re: debugging boot-loader code, controlling where CCS3.3 starts

    dsp_5g
    Tim, Thanks, very helpful !! ... but also spawns additional questions. Specifically, your suggestion to put an infinite loop early in the bootloader, to give me time in CCS to attach to the target, begs the question... What is the minimum amount of initialization that MUST be accomplished in the...
    on Nov 20, 2008

  • Forum Post: Re: why does my boot-load branch instruction NOT contain an absolute address to _boot_2 ??

    dsp_5g
    Brad, thanks for your reply: my device is a C6713B, but my problem was a failure to read another manual :-( The target location, _boot_2, was 0x90000400, and the CPU and Instruction Set manual clearly states the the MVKL, MVKH instructions each embed 16bits of address into the opcode, shifted 7-bits...
    on Nov 25, 2008

  • Forum Post: Re: How to get the correct AIS bin file for SPI flash boot on dm6431?

    Eric Fang
    Dear Matt, I am sure that there is SPI activity. I do set the bootmode. In order to debug, I boot with 24-bit SPI boot, then connect 6431 DSP with emulator. The code in my SPI flash will dump some logs in DDR2 memory. I am still studying these logs. Current status is that when I burn a smaller...
    on Feb 24, 2009
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