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c6474
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  • Forum Post: Serial Rapid I/O: Request for example code for bulk data transfers >4kiB (EVM6474)

    Dieter Landl
    With the EVM6474 kit some examples for SRIO transfers are delivered. All the examples support only transfer sizes of up to 4096 byte (with origin in internal memory). Are there any Serial Rapid I/O examples for transferring more than 4096 byte, let's say some MegaByte with source and destination...
    on Mar 25, 2009

  • Forum Post: About CCS IDE update issue for C6474

    touse
    Dear all: I want to simulate TMS320C6474 DSP with CCS v3.3, and it requires to update the CCS V3.3 to support this DSP, so I download the SR12_CCS_v3.3_SR_3.3.82.13.exe from my.TI. But when running the update package, following warning is given: Warning --------------------------- Setup has not...
    on Apr 9, 2009

  • Forum Post: Re: Printf delaying SRIO interrupts on C6474 EVM target.

    TimHarron
    gareth james 1] Has anyone else encountered this behaviour? Because printf() follows the C standard it is cumbersome and slow. This sort of behavior is typical because the system has to stop and wait for the printf() call to complete. gareth james 2] Is it a bug in the DSP/BIOS and printf() functionality...
    on Apr 30, 2009

  • Forum Post: I2C bootloader about C6474

    NINGMENG CHEN
    I2C bootloader: in our board, we use the I2C master bootloader method, but it is inconvenient when creating the boot Image ourselves. so, can you offer us some I2C bootloader examples for 6474, the tools for creating the boot image and the relevant documents?
    on Jun 4, 2009

  • Forum Post: Re: Serial Rapid I/O: Request for example code for bulk data transfers >4kiB (EVM6474)

    Dieter Landl
    Yes, I wondered too. But actually I've rewritten the example code. Now buffers from external memory of DSP-A are transfered to external memory of DSP-B by means of LSU-transfers and without any extra EDMA coding (i.e. all necessary EDMA is done by SRIO!). As the first reply shows, just change...
    on Jun 9, 2009

  • Forum Post: C6474 porting Mcpsp_Edma_example to DSP/BIOS

    gareth james
    I am trying to use the Mcbsp_Edma_example sample code from the EVMC6474_V1\csl_C6474\examples\mcbsp\mcbsp_edma directory, but need to port it to a DSP/BIOS environment. The code as it stands works. I am having difficulties porting it to a DSP/BIOS wrapper. The area that I think I am having problems...
    on Jun 17, 2009

  • Forum Post: Can multiple C6474 devices use the same SmartReflex supply?

    Vedananda Ramnath
    One of our customers has a design where they are planning for 8 C6474 DSPs on their board. Most of the application notes and EVM explains about power supply (CVDD) for single processor along with Smart reflex technolgy (each processor has a seperate regulator for CVDD). Is it possible to configure...
    on Oct 6, 2009

  • Forum Post: C6474 boot throgh EMAC

    mfarah
    HI, Does any body have any utility/ sample program on how to send the boot image from a PC to EVM6474 through EMAC? and what is the EMAC address of the EVM6474 in this case (at boot time)? Many thanks, Maroun
    on Nov 19, 2009

  • Forum Post: C6474 if i want to update buffer values after EDMA transfer completion ,and how can i do

    zhengwen zhang
    Hi, I am studying EVM6474.the board consist of AIF, EDMA,FSync. i have enable AIF, initialize the transmiss buffer and receive buffer, then configuration EDMA(event-trigger,not manually-trigger), AIF, Interrupt, fsync, and setup timer for UMTS fsync. After EDMA transfer completion once, i want to...
    on Dec 9, 2009

  • Forum Post: C6474　BOOT

    ATSUSHI TANAKA
    Please teach a boot method of multicore. I want to boot core 1 with core 0 after a boot with core 0 in I2C master boot. I want to write in a program at internal ram (0x00800000)of Core1. As for internal ram, all the addresses become 0x00800000, but how should set it for access to internal...
    on Feb 6, 2010

  • Forum Post: C6474 boot check sum

    ATSUSHI TANAKA
    Please teach it about ones complement check sum.
    on Feb 8, 2010

  • Forum Post: L2 configure on evm board

    Wang Nan
    I am working on EVM c6474. I want to make DSP0 working on asymmetric ,and the other DSP(DSP1) working on symmetric. I find the sixth of SW5 is for L2CONFIG, but it is configure DSP0 and DSP1 both. How can I configure DSP0 on asymmetric and the other on symmetric on EVM board. Thank you for...
    on Feb 24, 2010

  • Forum Post: DSPTMS320C6474 Cache Coherent function GSM ,Ftype used in SRIO

    tarik taro
    i wanna just to understand how can i implement cache coherent function GSM ( specially value indicated in Ftype of SRIO) thanks
    on Mar 16, 2010

  • Forum Post: I2C bootload on c6457

    AndrzejGalas
    Hi, we would like to boot load c6457 from flash on I2C. We are able to read from and write to it. We have used before c5455 an we used to prepare an aplication image in the way described in http://focus.ti.com/lit/an/spraae9/spraae9.pdf. Should it be working with c6457? When we program flash...
    on Apr 14, 2010

  • Forum Post: Re: SRIO Direct I/O and Doorbells

    dkerns
    MugdhaK Hi, In BIOS 6, you need to set eventId to the interrupt selection number to map the vector ID to the interrupt number. In your case, since you have interrupt vector 6 and interrupt number 20: Hwi_Params_init(&hwiParams); hwiParams.enableInt = FALSE; hwiParams.arg = 6; hwiParams...
    on Apr 16, 2010

  • Forum Post: C6474 sRIO Error Info Questions

    TommySong
    There is a sRIO failure case that has below error info: Logical/Transport Layer Error Detect CSR register (offset 2008) value: 0x01800000. That indicates there are PKT_RSPNS_TIMEOUT and UNSOLICITED_RSPNS. Port 0 Error Detect CSR register (offset 2040) value: 0x80500005. That indicates there...
    on May 19, 2010

  • Forum Post: Dissipation of C64x+

    ouazza wazo
    hi all, I have a question about how the value 2 watt per core is found for C64x+ dissipation. compared to what is measered? so what is the conditions of measurement of this value? Thanks for more details. ouazza wazo
    on Jun 26, 2010

  • Forum Post: Power measurement for the C6474

    Bryan Busacco
    I see an old query regarding power measurement on the C6474 DSP dated OCtober 2009. In it they mention a document ( SPRAAW7.pdf ) that I can not locate. Also, there is mention of a spreadsheet. Is this information available and where do I find it? I assume the spreadsheet was done in Excel, and...
    on Jun 30, 2010

  • Forum Post: Re: c6474 emacboot problem

    ocv
    Hi, Same is happening for me too.DSP is hanging at the delay function(checked by using the GPIO lines).The PHY is not getting configured after removing the delay function. Regards, ocv.
    on Jul 1, 2010

  • Forum Post: Compilation error from DIO_lib.

    ocv
    Hi, I am using DIO libraries for doing the SRIO enumeration in C6474 EVM.I used the same .tcf file mentioned in testDIO_tcpFarm project.But it gives the following error while compiling. [testDIO_tcpFarm.tcf] "C:\CCStudio_v3...
    on Jul 12, 2010

  • Forum Post: Re: Compilation error from DIO_lib.

    ocv
    Hi, I could solve it by modifying the .tci file. Regards, ocv.
    on Jul 13, 2010

  • Forum Post: How to load DSP code to EVM on three cores of C6474 DSP using global L2 base memory address?

    Bin53672
    Hi, I need to use global L2 base memory address in my DSP code for C6474. I generate three DSP images, one for each C6474 core. All three images are identical except the base address of L2 memory is configured differently on TCF file. For core 0, I use address location of 0x 10 800000 for the global...
    on Jul 19, 2010

  • Forum Post: EVM6474 CSL EDMA interrupt

    lpeng
    Hi all, I have built a project which uses edma to move data from core0 to core1. BufData is initialized on core0 and edma interrupt is mapped to core1's vect4, then core0 setup edma and trigger channel. I want edma to notify core1 after it finishes moving the data, but the result shows that the...
    on Jul 22, 2010

  • Forum Post: Re: Selecting a default DeviceID to boot C6474 over RapidIO

    Dirk Buijsman
    Great info! I have been stumbling over meaning of CFGGP[], CFG[] and DEVNUM[] .Now it makes sense (I think, please confirm): For the C6474, DEVNUM[3:0] is what is referred to as CFG[3:0] in SPRAAV8, and CFGGP[2:0] in SPRUEC6D. At this time the documentation is still incorrect. I hope it'll be...
    on Jul 27, 2010

  • Forum Post: VCP2 with tail-biting

    Curtis Rhodes
    Hi, I am interested in using the VCP2 peripheral to decode a convolutional code that uses tail-biting. I see a couple of options for this in the " TMS320C6474 Chip Support Library API Reference Guide" in the VCP2_BaseParams struct : Bool VCP2_BaseParams::tailBitEnable ...
    on Aug 11, 2010
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