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omapL138
Related Posts

  • Forum Post: OmapL138 USB A to mini-B drivers

    Russ Fuchs
    I have attempted to connect my PC to the OMAP-L138 EVM board's mini-B USB connector. When I power on the board, the PC new hardware window pops up and prompts for the location of the drivers. I pointed to the CD that I downloaded from the LogicPD web site but the new hardware wizard reported that...
    on Sep 10, 2009

  • Forum Post: DSP Link OMAPL138

    Joe Tijerina
    Im having trouble getting printf statements to work. I'm building a DSP Link sample application with printf statements on the DSP side and running it on target (OMAPL138) but the printfs statments do not seem to work. printf's work just fine on the ARM side but not on the DSP. I'm building...
    on Oct 19, 2009

  • Forum Post: OMAPL138 Questions

    Check12
    Hello, I have been making great progress with the experimenter's board. I have a few questions: I don't see any reference to a real time clock chip on the EVM board, is this not included? In the OMAPL138 hardware spec doc, the pin functions for each connector is listed. I am assuming...
    on Nov 3, 2009

  • Forum Post: Re: OMAP L-138 NAND Flash programming

    Szymon Kuklinski
    Thank you, it certainly helped me get back on a good track. In the link you provided I've found a program called UART Boot Host v1.0: http://www-s.ti.com/sc/techlit/sprab04.zip Using it seems very promising but I'm experiencing a problem. At the moment I'm testing the ARM side of OMAP...
    on Nov 6, 2009

  • Forum Post: Re: OMAP L-138 NAND Flash programming

    Szymon Kuklinski
    Hello again I encountered another problem while booting through UART Boot Host. I created an AIS image of the u-boot binary provided in your package (http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/omap_l138/1_00/latest//exports/OMAP_L138_arm_1_00_00_06.tar.gz) setting the boot mode...
    on Nov 13, 2009

  • Forum Post: Re: OMAP L-138 NAND Flash programming

    Szymon Kuklinski
    I used the register calculator (http://tiexpressdsp.com/images/d/dd/MDDR_DDR2_Memory_Controller_Register_Calc.zip) and the information given on the DDR memory manufacturer (http://download.micron.com/pdf/datasheets/dram/mobile/512mb_ddr_mobile_sdram_t47m.pdf) to compute the correct values, with no luck...
    on Nov 17, 2009

  • Forum Post: Re: OMAP-L138 EDMA3

    Joe Tijerina
    Thank you for suggestion, that worked out for me. My next question is about the uPP DMA. Is it sufficient to poll the UPxS2.PEND bit to rewrite the DMA descriptor registor and not corrupt the current DMA transfer (for transmission). If I poll the PEND bit , is it necessary to enable any of the interrupt...
    on Dec 3, 2009

  • Forum Post: OMAP-L138 uPP 32-bit transmit mode

    taylor_891229
    If I have 64-bit data 0x00112233-44556677 from Memory move to uPP port used by 32-bit trasmit-mode. What's data output via uPP of CH-A[15:0] and CH-B[15:0] ? (CH-A = 0x00112233, CH-B=0x44556677 or otherwise) Thank you.
    on Dec 24, 2009

  • Forum Post: Re: Linker trouble in CCS4

    ravindra mudreddy
    thanks joe can you please let me know from were can i dowload ccs3.3, i have searched but its not present in the TI site
    on Jan 8, 2010

  • Forum Post: OMAP-L138 LINUX SATA DRIVER

    Ronald
    I connect SATA Harddisk with OMAP-L138, but it don't work. SATA drives under linux 2.6.32-rc6 is supported? It cann't reset successful: ata1: link is slow to respond, please be patient (ready=0) ata1: softreset failed (device not ready) ata1: link is slow to respond, please be patient ...
    on Jan 15, 2010

  • Forum Post: HELP!Problem with OMAP L-138 EVM using USB OTG in Host mode

    Anton Zhadchenko
    Hi all, First of all, I am sorry for my English:) I try to using TI OMAP L138 EVM Kit - USB OTG in HOST mode Reading SPRUFM9D I thik I doing well USB initialization like observe on page 81 Reading DEVCTRL=0x5D and POWER=0x61 registers in OTG. And now I trying to start Control Transfer...
    on Jan 18, 2010

  • Forum Post: [OMAPL138] Why is RingIO_sendNotify blocking?

    Szymon Kuklinski
    I'm using RingIO for transmitting large amounts of data between ARM and DSP. Everything goes well, except from one thing. RingIO_sendNotify called from Linux to DSP tends to block once a few calls. Under what circumstances does RingIO_sendNotify block? Sending notifications from DSP to Linux seems...
    on Jan 28, 2010

  • Forum Post: RingIO and MSGQ sharing one POOL

    Szymon Kuklinski
    Hi! In my DSPLink application I'm using both RingIO and MSGQ components. I'm wondering how to configure POOL appropriately. Would you recommend splitting POOL into two smaller parts ande use one for RINGIO and one for MSGQ or to share one POOL between the two components? If no. 2 is better...
    on Feb 1, 2010

  • Forum Post: Re: DSPLink MSGQ_locate always returns SYS_ENOTFOUND

    Szymon Kuklinski
    When I place my MSG_locate call in a seperate task and not the main function it seems to work ok. Why is that? Is calling blocking functions like MSGQ_locate in main messing up the program?
    on Feb 1, 2010

  • Forum Post: C6748 power consumption

    Krzysztof Czyz
    I have been looking for detailed information on static and dynamic power consumption of OMAP-L138 and C6748 DSPs. Is there any document (as for example for Blackfin DSPs) on dynamic power consumption as a function of power supply voltage and frequency? Thanks, Krzysztof
    on Feb 4, 2010

  • Forum Post: [OMAP-L138] DSP/BIOS Link's shared memory

    Stephen Lin40335
    Hi, Can someone tell me what's the maximum shared memory DSP/BIOS Link can have to share between GPPApp and DSPApp? From the programmer guide OMAP-L138, it stated it has default of 1MB, but can be increased by modifying/adding the memory table. Also, what type of memory is it and exactly is...
    on Feb 9, 2010

  • Forum Post: Re: DSP/BIOS Link's shared memory

    Stephen Lin40335
    thanks for the detail reply. The reason for large shared memory is to offload huge amount of DSP computation data to the peripherals. And we need to do lots of sample rate calculation on several channels filtering, therefore needs lots of memory to handle the computational results from DSP core to...
    on Feb 11, 2010

  • Forum Post: Re: OMAP L-138 and RMII

    Szymon Kuklinski
    Hello I reviewed the problem using an oscilloscope and noticed that there was a clock collision between the PHY and OMAP. By setting PINMUX15 to 0x00000080 I got a non distorted 50 Mhz clock. I must have edited this register by mistake since my intention from the beggining was to PHY to clock the...
    on Feb 12, 2010

  • Forum Post: Re: OMAP L-138 and RMII

    Szymon Kuklinski
    Hi Did anyone experience any similar issues using Logic's EVM expansion board with RMII interface PHY attached? We are in possession of eXpermineter kit only where MII interface is used, so it's more difficult to compare what' wrong. Regards Szymon
    on Feb 15, 2010

  • Forum Post: C6748 USB0 example code initialization failure (SYSCFG / PLL setting failure)

    Uri Shkolnik
    Hi, I would like to build a C6748 DSP firmware which activates the USB0 as USB peripheral (device). For the first stage I'm trying to use the BIOSUSB's example "usbdevhid". Environment: LogicPD's Zoom OMAP-L138 eXperimenter Kit. CCS 4.1 BIOSUSB 1.10.1 Gel...
    on Mar 7, 2010

  • Forum Post: Re: EDMA Transfer Completion Interrupt

    Szymon Kuklinski
    I'm still having some doubts about TCINTs. Here's the whole situation: EDMA Channel 1 is triggered upon TXEVT from McASP. It does some preliminary data transfer and manipulation and then triggers channel 10 that is chained onto it (so TCC field in channel 1 is set to 10 to allow chaining)...
    on Mar 16, 2010

  • Forum Post: Re: EDMA Transfer Completion Interrupt

    Szymon Kuklinski
    Hello! Thank you for your help. I really appreciate it. One last thing about the registers... Should I write to IESR[8] in "Global Channel Registers" (address 0x01C0 1060 for OMAP L-138) or to "Shadow Region 1 Channel Regiser (0x01C0 2260)? Anyway, by setting both to 8, all others...
    on Mar 16, 2010

  • Forum Post: Re: EDMA Transfer Completion Interrupt

    Szymon Kuklinski
    Hi I followed some hints you mentioned and still the program freezes in the mentioned while loop. Here's my EDMA config code...: unsigned int chIdTX0 = EDMA3_DRV_HW_CHANNEL_EVENT_1; unsigned int chIdTX1 = EDMA3_DRV_DMA_CHANNEL_ANY; unsigned int tccTX0 = EDMA3_DRV_TCC_ANY; unsigned...
    on Mar 17, 2010

  • Forum Post: Re: EDMA Transfer Completion Interrupt

    Szymon Kuklinski
    Hi! Again, thank you for the time you've spent helping me with my problem. I'm aware of the fact that I can hook up a callback function so that it runs as ISR. If I do it that way my ISR does get executed but the program still gets stuck in the mentioned while loop not allowing me to proceed...
    on Mar 18, 2010

  • Forum Post: Re: EDMA Transfer Completion Interrupt

    Szymon Kuklinski
    Hi As you suggested I did some research on #1. It turns out that when I force my DSP program to allocate buffers used by DMA in L2 memory instead of RAM it works just fine and doing complex stuff in Linux doesn't kill the DSP application (if anyone is interested the procedure of placing buffers...
    on Mar 19, 2010
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