The documentation for PLL divider ratios in the Registers PLLDIV4 and PLLDIV5 are different between the PLL User's Guide (SPRUE56) and the Device Datasheet (SPRS276M). The CSL function CSL_pllcHwSetup() implement the ratios as descibed in the PLL User's Guide (Register = Ratio-1), but I think this is not correct.
Ralf
Ralf,
The PLL User's guide (SPRUE56) is a generic document across all C645x devices. As such, you have to defer to the data manual if the device specific implementation is different.
In the users guide, we do state "For more detail about the PLL, see the device-specific data manual.". If there is a discrepancy, we encourage you to consider the data manual to be accurate until we have verified the discrepancy. Thanks a lot for bringing this to our attention, we will look into the CSL implementation.
Regards,
Aditya
Ralf, you are right the CSL implementation is (ratio-1).
if (hwSetup->divEnable & CSL_PLLC_DIVEN_PLLDIV4) {
CSL_FINS (pllcRegs->PLLDIV4, PLLC_PLLDIV4_D4EN, CSL_PLLC_PLLDIV4_D4EN_ENABLE);
CSL_FINS (pllcRegs->PLLDIV4, PLLC_PLLDIV4_RATIO, hwSetup->pllDiv4 - 1);
}
While the semantics might seem odd at first, basically you need to pass (ratio + 1) to the function. So you will pass pllDiv4 = 1 for a /2, pllDiv4 = 2 for a /4, pllDiv4 = 3 for a /6, pllDiv4 = 4 for a /8 and so on until the max allowable 7h for a /16. It is just that the same "ratio + 1" value will give you different divider values for PLLDIV4 and PLLDIV5 due to different implementations. That is my understanding of the CSL as it pertains to the datasheet.