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Why does not these two instructions parallel?

Hi,

I write some assembly code (C64 code, CCS 5.5, CGT 7.4.4). I do not understand why the compiler refuse these two instructions parallel:

                 .asg B9, state_reg

               SHL state_reg, 1, state_reg

    [B0]    SET    state_reg, 0,0, state_reg
|| [!B0]    CLR   state_reg, 0,0, state_reg

The error message is shown in the picture.   Thanks,