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Problem with 1Gb EMAC on my custom board

Hello,

I used NDK ver 2.0.0 on my c6455 custom board. It was ok with 10/100 FullDuplex communication but when i change configuration of c6455 into "GMII" the interface between board and PC is unreachable!

this message has been shown on CCS v5.2.1 :

[C64XP_0] TCP/IP Stack Example Client
[C64XP_0] Using MAC Address: e7-11-13-08-7c-45
[C64XP_0] EMAC should be up and running
[C64XP_0] EMAC has been started successfully
[C64XP_0] Registeration of the EMAC Successful
[C64XP_0] Network Added: If-1:xxx.xxx.1.2
[C64XP_0] Service Status: Telnet : Enabled : : 000
[C64XP_0] Service Status: HTTP : Enabled : : 000
[C64XP_0] Link Status: 1000Mb/s Full Duplex on PHY 7

and my PC recognizes this 1Gb/s local network, too.

Then I ping but no interface exist!

Should I change any code in NDK or any consideration is there here?

  • Hi,

    Thanks for your post.

    I presume that, you have chosen the appropriate PHY mode (GMII) selection through MACSEL [1:0] bits through device status register(DEVSTAT). If so, please make sure the the link status through MDIO Registers, MDIO PHY Alive Status Register & MDIO PHY Link Status Register.

    Kindly ensure into the below files to select the right PHY mode in the NDK installation directory:

    ndk_2_0_0\packages\ti\ndk\src\hal\dsk6455\eth_c6455

    Refer the csl_mdio.c and ethdriver.c files for PHY mode selection.

    The MDIO_open function gives the PHY mode selection in csl_mdio.c
    Uint32  macsel;             /* PHY mode selection */

    Please refer the c6455_mdio.c which can be written  for GMII Interface as:

     /* Settings for Broadcom phys */
     
            if ( macsel == CSL_DEV_DEVSTAT_MACSEL_RGMII )
            {
                    //Put phy in copper mode
                    PHYREG_write(PHYREG_ACCESS, phyAddr,  PHYREG_ACCESS_COPPER);
                    PHYREG_waitResultsAck( i, ack );
     
                    /* If the PHY did not ACK the write, return zero */
                    if( !ack )
                            return(0);
     
                    PHYREG_write(0x10, phyAddr,0x0000 );  //GMII Interface
                    PHYREG_wait();
     
                    // Put phy in RGMII mode/in-band status data for PG 2.0
                    if (EMAC_REGS->TXIDVER != 0x000C1207) {
                            PHYREG_write(PHYREG_SHADOW, phyAddr, PHYREG_SHADOW_INBAND);
                            PHYREG_waitResultsAck( i, ack );
     
                            /* If the PHY did not ACK the write, return zero */
                            if( !ack )
                                    return(0);
     
                    }
            }
    

    Also, please check whether you have modified the MACCONTROL reg in order to set the LOOPBACK bit to 1? If so, kindly check the status of MACSTATUS register become 0x80000000 or 0x00000000?

    Did you see TXGOODFRAMES reg. becomes 1 in the Tx. function and likewise, RXGOODFRAMES reg. becomes 1 in the Rx. function after you set the LOOPBACK bit in the MACCONTROL register?

    Perhaps, GMII interface would also require a different clock consideration unlike 10/100 full duplex communication, so, please validate & measure the 125MHz clock signal at GMTCLK and MRCLK pins and by this way, we can ensure the clock requirement for GMII would be correct.

    Alternatively, you could also check the guidelines wiki while porting NDK to different ethernet PHY as  below:

    http://processors.wiki.ti.com/index.php/Guidelines_when_porting_NDK_to_different_PHYs

    Thanks & regards,

    Sivaraj K

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  • Thanks for your reply,

    I had configured MACSEL bits and I checked GMTCLK [125 MHz] by OSC. It was OK. MACSTATUS register is 0x80000000 and PHY-LEDs that indicate link status is in 1000 Mb mode. But when I got a memory dump of the EMAC0 registers memory region [I attached it for you and other experts] in 10/100 Mb and 1000 Mb mode, I found these confusing differences:

    1. In 10/100 Mb, RXGOODFRAMES is larger than RXBCASTFRAMES. This is OK. But in 1000 Mb, RXGOODFRAMES is equal to RXBCASTFRAMES. Please, tell me why this occurred!

    2. In 1000 Mb, RXOCTETS is very smaller than 10/100 Mb mode. I think the answer of this question is dependent to previous question. But, why does this occurred?

    8738.ETH_100FP.dat

    1033.ETH_1000FP.dat