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TMS320C6416 parallelism

bilal Ahsan1
Prodigy 100 points
Other Parts Discussed in Thread: TMS320C6416

hello,

I am new to DSPs, I have a query regarding TMS320C6416, it is single core device with 8 independent functional units to take advantage of parallelism, Is there any way to enhance the parallel execution? can we set certain registers values to enable or disable certain functional units?

  • 0
    TI__Guru** 116100 points
    What functional unit are you want discussing about ?
    Could you please elaborate a bit on your requirement.
  • 0 in reply to Titusrathinaraj Stalin
    Prodigy 100 points
    TMS320C6416 core has 8 FU, arranged into two groups A and B each with one multiplier and 3 ALUs(M1,M2,L1,L2,S1,S2, D1 and D2). I want to take full advantage from parallelism, I want max utlilization of these execution resources? Could you please give me some advice on it.
  • 0 in reply to bilal Ahsan1
    TI__Guru*** 125430 points
    Read this: http://www.ti.com/lit/spra666
  • 0
    TI__Mastermind 35645 points

    Hi,

    Thanks for your post.

    May be, we would recommend you to use modulo type of instruction scheduling, a form of software pipelining which exploits instruction level parallelism (ILP) across loop iterations. By this way, we can optimize the execution of the software pipelined loop in which a single loop iteration can be divided into a sequence of stages where in each of the stages would be executing in parallel.

    The SPLOOP facility on the C64x+ DSP stores a single iteration of loop in a specialized buffer and contains hardware that will selectively overlay copies of the single iteration in a software pipeline manner to construct an optimized execution of the loop.

    Please refer section 7.5 for SPLOOP related instructions from the CPU instruction set reference guide as below:

    http://www.ti.com/lit/ug/spru732j/spru732j.pdf

    Also, see sections 4.1, 4.2 for more details on pipeline operation and execution as well see section 4.3 for performance consideration on pipeline interaction from the above reference guide.

    Thanks & regards,

    Sivaraj K

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