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Using SRIO to configure the DDR controller

Hi All,

I'm developing on a 6455 that is connected to the external world only through SRIO. Currently the firmware is downloaded via SRIO in IRAM after the boot, but I have the need to move it to an external DDR, because it's getting too big for the internal memory.

At boot the DDR controller is not configured (the firmware does that).

Is it possible to use SRIO to configure the DDR before the firmware is downloaded?

Regards.

Alessandro

  • Hi,

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com).

    Have you using SRIO boot mode for DSP boot?

    Yes, it is possible to configure DDR before load the firmware, but through SRIO is not possible.

    If you using no-boot mode means, i suggest first use TI provide DSP .GEL file to configure the DDR and verify whether the DDR memory is programmed correctly or not by writing the DDR memory in Code Composer Studio. If you using other boot modes means you can use the second stage boot loader to configure the DDR. Refer section "7 Bootloader Expansion" on boot loader user guide.

    Thanks,

  • Hi Ganapathi,

    Thanks for your prompt answer. 

    Do you think it is possible to perfom the procedure described in section 7 using SRIO boot mode instead of I2C EEPROM?

    Regards.

    -Alessandro

  • No, it is not possible on SRIO boot mode.
  • Hi Ganapathi,
    Why is it not possible to configure DDR through SRIO?

    From what I can tell reading through the C6455 datasheet, it looks like it is possible. Can you clarify for me why we can't? Below are some data points I've collected from the datasheet that suggests we can program the DDR2 controller from SRIO.

    - 1'st let's assume we enable the DDR2 controller at reset by driving device config pin ABA0 high.

    - The DDR2 configuration registers start at address 0x7800_0000, this would appear to be on the data SCR and not the config bus SCR.

    - The DDR2 CE0 address range starts at address 0xE000_0000

    - Figure 4.1 Switched Central Resource Block Diagram shows SRIO as a master on the left and the CFG SCR on the right, also shown in figure 4.1 is the DDR2 memory controller on the right.

    - Then if you look at table 4-1. SCR Connection Matrix, it shows SRIO can access both the config bus SCR and the DDR2 Memory Controller

    It's still not totally clear where the DDR2 configuration registers lie but I'm going to assume off the Data SCR and not the CFG SCR because it's not shown off the CFG SCR and also basedf on it's address range. So in figure 4-1 where is shows DDR2 Memory Controller, I have to assume this refers to -both- the configuration registers and the actual CE0 memory address range.

    So anyways, given the above information, I don't see why we can't configure the DDR2 controller from SRIO? Can you explain, I must be missing something or maybe there's something that's not documented.

    Thanks,
    -Brad
  • Brad,

    There is an SRIO boot example that demonstrates DDR initialization in MCSDK 2.x that you can refer to in order to load your boot image to DDR. The example is located at MCSDK2.x_INSTALL_DIR/tools/boot_loader/examples/srio/srioboot_ddrinit. Please refer to the ReadMe document for details regarding how to build and run the example with the EVM.

    Please let us know if you have any further questions.

    Regards,
    Rahul
  • Can you be more specific when you say MCSDK2.x? Where can I download this?

    I looked at the following download site but there are multiple MCSDKs. There's one called BIOSMCSDK-C64XPLUS which is version 1.00, then there's one called BIOSMCSDK-C66X which is version 2.01. Which one do I grab for the example you are referring to? Will this example work with the C6455 device? 

  • Hi Brad,

    The example that I refer to is in the MCSDK 2.x for C66x devices. the example may not work as is on the C6455 as the device using platform_lib that is created for C6678 and C6655 EVM platforms.

    Regards,
    Rahul