EDMA-MCASP ping-pong buffer read problems!

Hi,

I presume that it is c64x device and provided suggestions below:

As you know, the purpose of the ping-pong buffer is to allow you to continue filling one buffer while the other buffer is being DMA'd to the McASP for transmission to the codec output. To my opinion, for a sync'd ping/pong transfer,

We need 6 PaRAM SETs and two of which are active channels  (one for RCV and one for XMT). The RCV side uses the McASP RBUF as the source and gBufferRcv as the destination. The XMT side uses gBufferXmt as the source and the McASP XBUF register as its destination. The other 4 PaRAM SETs are used for linking ping and pong. The active channels are set as "ping" and are linked to  the pong reload PaRAM SETs. The pong reload PaRAM SET is linked back to ping. Hence, we need two active channels and 4 reload PaRAMSETs which is my understanding.

I do think, the essential part is that the McASP requires a constant, uninterrupted stream of data in order to prevent underflow of it's XRBUF. Therefore, the ping and pong buffers must remain in sync from the start of the program or else it will lead to underrun issue. Therefore, you must service the EDMA callback interrupt each and every time it happens or it will underrun. Therefore, if you do service the interrupt you will always remain in sync with the ping-pong swap. This means the McASP is essentially pulling the data from the ping-pong buffer whenever it needs, instead of you pushing the data into the ping-pong buffer when it is available.

Alternative, i would also recommend you to walkthrough the "edma_ping_pong_xfer_reg5" csl example from c6474_CSL_Rel_03_03_01 package which you could download from the link below:

http://www.ti.com/tool/sprc975

After you install, you could see the edma ping pong example from the below project path which would be a good starting point to refer edma ping pong buffer example for c64x device:

~\ti\c6474_CSL_Rel_03_03_01\C6474\csl_c6474\example\edma\edma_ping_pong_xfer_reg5\build\Edma_ping_pong_xfer_reg5.pjt

You could execute the above example and walkthrough the code for the edma ping pong buffer functionality.

Thanks & regards,

Sivaraj K

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Hi,

Thanks for your update.

The same C6748 starterware example code is modified with two buffers (ping, pong) on both tx. and rx. side and accordingly, configure ping pong buffers for 150 stereo samples of 16 or 32 bits/sample. Buffers used in the code are rxbuf_ping, rxbuf_pong, txbuf_ping, txbuf_pong and please check the attched "OMAPL138_StarterWare_McASP_EDMA_PING_PONG.zip" below

/cfs-file/__key/communityserver-discussions-components-files/791/5618.OMAPL138_5F00_StarterWare_5F00_McASP_5F00_EDMA_5F00_PING_5F00_PONG.zip

After extracting the above zip file, you could see the McASP play back example project with EDMA ping ping buffers at the below build path:

~\ti\OMAPL138_StarterWare_McASP_EDMA_PING_PONG\build\c674x\cgt_ccs\omapl138\lcdkOMAPL138\mcasp\.ccsproject

Thanks & regards,

Sivaraj K

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HI Sivaraj

This is most probably a Cache problem as the buffers are external to the processor in DDR. So there seems to be a cache coherence problem that I am trying to fix. It would be helpful if you can point me to some code that uses double buffering in external memory and dma that uses the cache coherence calls to manage these types of issues.

Will let you know if I am able to fix this. So for the cash invalidate calls have failed :( This processor is really complex and I am not sure if I can make the deadlines of the project. There seems to be a gotcha around every corner. I am considering using an arm processor with floating point DSP module (M4) which will be simpler to program and manage.

For now I haven't still given up. Fingers crossed.

Thanks and regards

Manjula