Registering EDMA ISR with DSP core.

I looked at the example in CSL , it doesn't have IRQ number and is looping on ACTV bit in CCSTAT register to indicate completion of transfer and not on ISR.

Thanks Sivaraj for sharing the documents I looked through the EDMA3 LLD and I could see that the code present in it is same as mine. The file sample_omapl138_arm_int_reg.c has this code

/**  To Register the ISRs with the underlying OS, if required. */
void registerEdma3Interrupts (unsigned int edma3Id)
    {
    static UInt32 cookie = 0;
    unsigned int numTc = 0;
    Hwi_Params hwiParams; 
        
    /* Disabling the global interrupts */
    cookie = Hwi_disable();

    /* Initialize the HWI parameters with user specified values */
    Hwi_Params_init(&hwiParams);
    
    /* argument for the ISR */
    hwiParams.arg = edma3Id;
	/* set the priority ID     */
	hwiParams.priority = hwIntXferComp[edma3Id];
    
    hwiCCXferCompInt = Hwi_create( ccXferCompInt[edma3Id][gpp_num],
                			(&lisrEdma3ComplHandler0),
                			(const Hwi_Params *) (&hwiParams),
                			NULL);
    /* Initialize the HWI parameters with user specified values */
    Hwi_Params_init(&hwiParams);
    /* argument for the ISR */
    hwiParams.arg = edma3Id;
	/* set the priority ID     */
	hwiParams.priority = hwIntCcErr[edma3Id];
	
	hwiCCErrInt = Hwi_create( ccErrorInt[edma3Id],
                (&lisrEdma3CCErrHandler0),
                (const Hwi_Params *) (&hwiParams),
                NULL);

    while (numTc < numEdma3Tc[edma3Id])
	    {
        /* Initialize the HWI parameters with user specified values */
        Hwi_Params_init(&hwiParams);
        /* argument for the ISR */
        hwiParams.arg = edma3Id;
    	/* set the priority ID     */
        hwiParams.priority = hwIntTcErr[edma3Id];
        
        hwiTCErrInt[numTc] = Hwi_create( tcErrorInt[edma3Id][numTc],
                    (ptrEdma3TcIsrHandler[numTc]),
                    (const Hwi_Params *) (&hwiParams),
                    NULL);
        numTc++;
    	}
   /**
    * Enabling the HWI_ID.
    * EDMA3 interrupts (transfer completion, CC error etc.)
    * correspond to different ECM events (SoC specific). These ECM events come
    * under ECM block XXX (handling those specific ECM events). Normally, block
    * 0 handles events 4-31 (events 0-3 are reserved), block 1 handles events
    * 32-63 and so on. This ECM block XXX (or interrupt selection number XXX)
    * is mapped to a specific HWI_INT YYY in the tcf file. So to enable this
    * mapped HWI_INT YYY, one should use the corresponding bitmask in the
    * API C64_enableIER(), in which the YYY bit is SET.
    */
    Hwi_enableInterrupt(hwIntXferComp[edma3Id]);
    Hwi_enableInterrupt(hwIntCcErr[edma3Id]);
    Hwi_enableInterrupt(hwIntTcErr[edma3Id]);

    /* Restore interrupts */
    Hwi_restore(cookie);
    }

This code is for registering ISR with ARM , I believe the change for DSP will be the IRQ no . I am using IRQ no as 91 and using almost the same code , but I still wont get my ISR called.

I did a bit more debugging this time with DMA0 , I ve made proper changes to base address and the IRQ no is now 8. I am using channel #0 for a manually triggered event . I did a print from Event Flag Registers  (EVTFLAGn) and in (EVTFLAG0) I could see that bit 8 EF8 has been set but still my ISR function was not called. I am using this code to register ISR and IRQ_NO is 8.

int edma_register_isr(void *isr_func, struct edma_prv_data *pdata)
{
  /* TODO: User is required to define this function */

  Hwi_Params hwiParams;
  Hwi_Handle myHwi;
  Error_Block eb;
  System_printf("Registering ISR\n");
  System_printf("-->Event Flag0 = %x\n",REGR32(DSP_EVTFLAG0));
  System_printf("-->Event Mask0 = %x\n",REGR32(DSP_EVTMASK0));
  REGW32(DSP_INTMUX1,(IRQ_NO<<0)); //Should be IRQ_NO
  /* Initialize error block and hwiParams to default values */
  Error_init(&eb);
  Hwi_Params_init(&hwiParams);
  /* Set ISR parameters */
  hwiParams.arg =(unsigned int)pdata ;    /* Set your prvdata structure */
  //hwiParams.eventId =IRQ_NO;    /* INT Num*/
  hwiParams.enableInt = FALSE;
  //hwiParams.priority = 0x22;
  /* Create a Hwi object for interrupt number IRQ_NO
   * that invokes ISR with argument*/
  myHwi = Hwi_create(4,isr_func, &hwiParams, &eb);

  if (myHwi == NULL) {
    System_abort("Hwi create failed");
  }
  /* enable both interrupts */
  Hwi_enableInterrupt(4);

  return 0;
}

The mask register is 0xf.