Emifa Clock out Capture

Hello Senthil,

Thanks for reply,

All 4 DSP's are getting POR and able to target 4 DSP's is CCS v5 using emulator,

Able to launch the target configuration and initialize C6457.gel file,

EMIFA clock is been generated but P-P swing is less compared with working board,

Please find the attached scope capture of EMIFA clock output at pin V28,

Also find the attached working board scope capture of EMIFA clock output at pin V28. Board8_EMIFA.zip

Thanks,

Pramod