Hi
My customer has some questions about PCI EEPROM interface.
They are using C6414 with PCI EEPROM interface and basically it's working.
But according to their investigations, PCI EEPROM interface sometimes does not become ready state just after coming from RESET.
Please take a look at the following document:
The chapter of 12.4 DSP EEPROM Interface says that RSTSRC.CFGDONE, EECTL.READY and PCIIS.EERDY should be set as ready state automatically, but only EECTL.READY sometimes does not go to ready state.
For the workaround, they issue read command at this time and this looks forcing these bit-fields to ready state. After that, PCI EEPROM interface works fine.
Now questions :
1. What could cause this phenomenon ?
2. Is this expected behavior in deice point of view ?
3. Is the current workaround correct ? Or do you have any other suggestions for the workaround ?
Best Regards,
Naoki