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C6457 SRIO PSC not working to get power enabled - what could be causes

RandyP
Guru* 84110 points

On a production board with the C6457, we have found problems on one board when we try to bring up the SRIO peripheral. We would appreciate some help identifying things to look at to figure out why this board might be failing. We checked the normal things like power, clocks, and resets but may have missed something that you could help us identify.

Currently this is only happening on one board and started recently after having worked many power cycles.
 
When attempting to check the SRIO SPn_Error registers for evidence of port initialization we noticed this field is all zero, we next looked at the below register to see if the SRIO power domain was enabled and that status register indicated it was not. So I am not sure why we did not enable the control register successfully.

We are using chip support libraries within the image to initialize SRIO device. We boot from EMIF ACE3 location. We have ICE connected and are using code composer studio.

I am wondering if there are any hardware dependencies we could check that if were not true may also cause the PSC controller to not power the SRIO.

Thanks for any advice,
RandyP

  • 0
    TI__Guru** 116100 points
    Dear Randy,
    Checking with HW experts for this issue.
    Have they have tried to power ON SRIO module using gel file ?
  • 0 in reply to Titusrathinaraj Stalin
    TI__Guru* 84110 points
    Titus,

    Their code was developed from the GEL and other example code.

    It works on other boards successfully. There is some hardware problem with their board and they want to know what issues could affect successfully powering up the module in this one case. There is nothing obvious that can be seen, so your help is appreciated to address their question about what things can affect the power up.

    Regards,
    RandyP
  • 0 in reply to RandyP
    TI__Guru** 116100 points
    Hi Randy,
    I have requested the HW team to look into this issue.
    You would get response soon.
  • 0
    TI__Guru* 78305 points

    Hi Randy

    For now I have the "standard" list of questions. 

    1) They said they have checked power and clocks etc - can they share a the power and clock snapshot for a good vs bad board, perhaps with emphasis on SRIO supplies. 

    2) On the failing board, does the rest of the device function properly and just SRIO is not functional? How can they tell that the power cycling has not damaged the device overall?

    3) You shared the value of PDSTAT, can they also check the value of PTSTAT register for SRIO power domain , as well as SRIO LPSC etc via MDSTAT registers? Looks like on this device the power domain control is primarily for the on module RAMs in the SRIO , it is unclear whether the rest of the SRIO logic is getting hte clocks. 

    4) Can you confirm that "all" SRIO registers are zero? One good way to check whether or not the SRIO module is getting the clocks or not would be to double check the module PID register , which is typically non zero (it is not clear whether the error register can never be all zeros etc). 

    5) Have the other boards been exposed to similar power cycling?

    6) When the SRIO module is initialized in code (which you say is referenced from GEL file etc) - on the bad board, does it go through the entire initialization routine or is it stuck somewhere? 

    Regards

    Mukul