Issues in boot up a C6745 as a slave on the SPI

Alexandr Ishkov

Other Parts Discussed in Thread: TMS320C6745

Hi all,
I boot up a C6745 as a slave on the SPI1 bus from host microcontroller, but I have issues with most of devices: some of ones (C6745) doesn't answer on start word synchronization (I try to send it 10000 times) or answer, but have no answer on ping opcode. Boot is succesfull after reset and send start word synchronization 2..5 times.
There is no info in manuals about these questions (also I searched for it in internet)
1. Which pins I must set to select boot mode: BOOT[0]..BOOT[3] and BOOT[7], or all pins BOOT[0].. BOOT[15]?
2. What maximum bitrate on SPI? I use 3Mbit/s.
3. What minimum interval between 16-bit words on SPI in start synchronization process, init boot process, and loading firmware process? I insert 40 mks delay between words. If I remove this delay in start synchronization process - bit's synchronisation in answer to start word synchronization has corrupted. If I remove this delay in init boot process - C6748 doesn't answer on ping opcode.
4. How make boot up faster? Loading time of my firmware is 1.9 seconds, I want to make it faster than 0.5 second.

over 7 years ago

0 Titusrathinaraj Stalin over 7 years ago

TI__Guru** 116100 points

Please refer to the below e2e post.
e2e.ti.com/.../1960744
To boot up faster, try to reduce the size of boot code by moving the initialization code into flash.

Can you please refer to the bootloader guide ?
You need to use "BOOT[0], BOOT[1], BOOT[2], BOOT[3] and BOOT[7]" for boot mode settings.

www.ti.com/.../sprabb1c.pdf

0 Alexandr Ishkov over 7 years ago in reply to Titusrathinaraj Stalin

Prodigy 30 points

In sprabb1c.pdf written: BOOT[0], BOOT[1], BOOT[2], BOOT[3] and BOOT[7] pins required to select a boot mode. But it is not written anywhere that the boot process only affect those pins, and do not affect the rest of the pins BOOT. Thank you for answering at least one question.
In the e2e.ti.com/.../1960744 topic said that the need to set the configuration of the SPI on the clocking of falling edge CLK when sending SWS, and change the configuration to the clocking of rising edge to receive a response. It's a very strange. You realy propose to do so?
To speed up the download you have to offer to install chip flash memory and boot from it? That is impossible to increase the download speed more than the current 50 KB/s in mode used by me?

0 Titusrathinaraj Stalin over 7 years ago in reply to Alexandr Ishkov

TI__Guru** 116100 points

I have requested already ROM bootloader expert to address this question.
Thanks for your patience.

0 Alexandr Ishkov over 7 years ago in reply to Titusrathinaraj Stalin

Prodigy 30 points

The problem of unstable start loading was solved by replacing the capacitor between OSCOUT and OSCVSS, and capacitor between OSCIN and OSCVSS from 22pF to 10pF. Prompt please, whether to develop a PCB layout recommendations for crystal oscillator circuits exist, considering that a separate ground pin generator TMS320C6745.

Processors

Processors forum

Issues in boot up a C6745 as a slave on the SPI