CCS/TMS320C6748: Error #10099-D: Problems with memory space on C6748 development kit

Joseph P

Part Number: TMS320C6748

Tool/software: Code Composer Studio

Hello,

I am using the C6748 development kit for data collection. I am trying to save around 5MB into an array. When I try to compile the program, I run into the error below:

**** Build of configuration Debug for project EMA_Speed_Test ****

"C:\\ti\\ccsv7\\utils\\bin\\gmake" -k -j 8 all -O
'Building target: EMA_Speed_Test.out'
'Invoking: C6000 Linker'
"C:/ti/ti-cgt-c6000_8.1.3/bin/cl6x" -mv6740 -g --define=c6748 --diag_wrap=off --diag_warning=225 --display_error_number -z -m"EMA_Speed_Test.map" --stack_size=0x0020000 --heap_size=0x0020000 -i"C:/ti/ti-cgt-c6000_8.1.3/lib" -i"C:/ti" -i"C:/ti/tirex-product-tree" -i"C:/ti/ti-cgt-c6000_8.1.3" -i"C:/ti/xdctools_3_50_02_20_core" -i"C:/ti/xdctools_3_32_02_25_core" -i"C:/ti/C6748_StarterWare_1_20_04_01/grlib" -i"C:/ti/C6748_StarterWare_1_20_04_01/usblib" -i"C:/ti/C6748_StarterWare_1_20_04_01" -i"C:/ti/C6748_StarterWare_1_20_04_01/drivers" -i"C:/ti/ti-cgt-c6000_8.1.3/include" --reread_libs --diag_wrap=off --warn_sections --display_error_number --xml_link_info="EMA_Speed_Test_linkInfo.xml" --rom_model -o "EMA_Speed_Test.out" "./DARIGHTONE.obj" "./gpio.obj" "./psc.obj" "../C6748.cmd" -llibc.a -l"C:/ti/C6748_StarterWare_1_20_04_01/binary/c674x/cgt_ccs/c6748/drivers/Debug/drivers.lib" -l"C:/ti/C6748_StarterWare_1_20_04_01/binary/c674x/cgt_ccs/c6748/lcdkC6748/platform/Debug/platform.lib" -l"C:/ti/C6748_StarterWare_1_20_04_01/binary/c674x/cgt_ccs/c6748/system_config/Debug/system_config.lib" -l"C:/ti/C6748_StarterWare_1_20_04_01/binary/c674x/cgt_ccs/grlib/Debug/grlib.lib"
<Linking>
"../C6748.cmd", line 45: error #10099-D: program will not fit into available memory. run placement with alignment fails for section ".far" size 0x9897c8 . Available memory ranges:
SHRAM size: 0x200000 unused: 0x1b836c max hole: 0x1b8368
error #10010: errors encountered during linking; "EMA_Speed_Test.out" not built

>> Compilation failure
makefile:147: recipe for target 'EMA_Speed_Test.out' failed
gmake[1]: *** [EMA_Speed_Test.out] Error 1
makefile:143: recipe for target 'all' failed
gmake: *** [all] Error 2

My question: right now it seems that the program is trying to use SHRAM (shared memory) which can only hold 128kB of data. I would like to use something like SDRAM or DDR2 (something that can contain more data), but am having trouble configuring the device to use it. I tried changing the used memory through the C6748.cmd file and was unsure if there was anything else I needed to do for configuration. I am fairly new to the board so I'm thinking that I am missing something.

Let me know if anything else is needed.

Thanks in advanced!

over 6 years ago

0 Cvetolin Shulev-XID over 6 years ago

TI__Guru 65405 points

Hi Joseph,

I've forwarded this to the SW experts. Their feedback should be posted here.

BR
Tsvetolin Shulev

0 Rahul Prabhu over 6 years ago

TI__Guru** 114410 points

Please provide your updated linker command file here. Moving code from SHRAM to DDR is the correct step but this will have performance implication as DDR access are usually slower that onchip memory access hence you need to turn on L1 and L2 data cache for all the code and data sections that are places in DDR2.

Refer to the Cache APIs and examples in the starterware package:
processors.wiki.ti.com/.../StarterWare_01.20.01.01_User_Guide

Regards,
Rahul

0 Joseph P over 6 years ago in reply to Rahul Prabhu

Prodigy 110 points

Here is my updated linker file

MEMORY
{
DSPL2ROM o = 0x00700000 l = 0x00100000 /* 1MB L2 Internal ROM */
DSPL2RAM o = 0x00800000 l = 0x00040000 /* 256kB L2 Internal RAM */
DSPL1PRAM o = 0x00E00000 l = 0x00008000 /* 32kB L1 Internal Program RAM */
DSPL1DRAM o = 0x00F00000 l = 0x00008000 /* 32kB L1 Internal Data RAM */
SHDSPL2ROM o = 0x11700000 l = 0x00100000 /* 1MB L2 Shared Internal ROM */
SHDSPL2RAM o = 0x11800000 l = 0x00040000 /* 256kB L2 Shared Internal RAM */
SHDSPL1PRAM o = 0x11E00000 l = 0x00008000 /* 32kB L1 Shared Internal Program RAM */
SHDSPL1DRAM o = 0x11F00000 l = 0x00008000 /* 32kB L1 Shared Internal Data RAM */
EMIFACS0 o = 0x40000000 l = 0x20000000 /* 512MB SDRAM Data (CS0) */
EMIFACS2 o = 0x60000000 l = 0x02000000 /* 32MB Async Data (CS2) */
EMIFACS3 o = 0x62000000 l = 0x02000000 /* 32MB Async Data (CS3) */
EMIFACS4 o = 0x64000000 l = 0x02000000 /* 32MB Async Data (CS4) */
EMIFACS5 o = 0x66000000 l = 0x02000000 /* 32MB Async Data (CS5) */
SHRAM o = 0x80000000 l = 0x00200000 /* 128kB Shared RAM */
DDR2 o = 0xC0000000 l = 0x20000000 /* 512MB DDR2 Data */
}

SECTIONS
{
.text > SHRAM
.stack > SHRAM
.bss > SHRAM
.cio > SHRAM
.const > SHRAM
.data > SHRAM
.switch > SHRAM
.sysmem > DDR2
.far > SHRAM
.args > SHRAM
.ppinfo > SHRAM
.ppdata > SHRAM

/* COFF sections */
.pinit > SHRAM
.cinit > SHRAM

/* EABI sections */
.binit > SHRAM
.init_array > SHRAM
.neardata > SHRAM
.fardata > SHRAM
.rodata > SHRAM
.c6xabi.exidx > SHRAM
.c6xabi.extab > SHRAM
}

I changed it a bit since I posted this question. Now I have .sysmem in DDR2 because I am using a malloc function for my array which requires a lot of heap space. The problem is that when I take a look inside DDR2 memory while my program is running, nothing changes. If I understand correctly, I need to use the GEL file to initialize the DDR2 memory in order to use it which I have not yet done, but I could be wrong. The only problem is that when I try to use my GEL file, it gives me a bunch of missing file errors. For example, the OnTargetConnect() function in the GEL file has the error below:

- #10021-D expecting filename, option, MEMORY, or SECTIONS
instead of "("
- #10008-D cannot find file "OnTargetConnect"
Based on this error, it seems like there is either some syntax error in the file causing a bunch of errors, or I am missing a bunch files that I need, but I am unsure.

So I guess my main question now is, assuming the GEL file is needed to initialize and use DDR2, what may be causing these errors in the GEL file?

0 Rahul Prabhu over 6 years ago in reply to Joseph P

TI__Guru** 114410 points

Connecting to C6748 LCDK in CCS is described here, if you have selected the correct platform the GEL should be populated:
processors.wiki.ti.com/.../AM1808_EVM_board_using_CCS?

Clocks and EMIF controller (external memory controller) need to initialized to read and write from DDR.

Please post your GEL file here and we can let you know what the issue is.

Regards,
Rahul

0 Joseph P over 6 years ago in reply to Rahul Prabhu

Prodigy 110 points

Hey Rahul,

Actually I tried initializing the board with the GEL file today and it worked. The last time I tried this, it gave me a ton of errors similar to the one in my last post which is strange. Data seems to be being allocated correctly in DDR2 now. If you would still like to see my GEL file I can post it up, but I think it's fine.

Upon researching this problem, I've realized how silly of a mistake not using the GEL file was. Sorry about that and thank you for the help.

0 Rahul Prabhu over 6 years ago in reply to Joseph P

TI__Guru** 114410 points

Joseph,

Thanks for providing the update here. I will close this ticket. If you have any further questions please create a new post.

Regards,
Rahul

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CCS/TMS320C6748: Error #10099-D: Problems with memory space on C6748 development kit