CCS/tms320c6748: tms320c6748 PWM thd

Hi Tsvetolin,

Thank you for your reply. Hope to get your answers soon.

BR,

Howard

Howard,

Please provide more information.  We are not sure of the question.  Also, I am not sure what is being shown in the scope and spectrum plots.

Tom

Howard,

Have you been able to resolve your issue?

Tom

Howard,

Have you been able to resolve your issue?  We will close this ticket next week if we do not see a response.

Tom

Hi Tom,

I had made a mistake, i replay the message by e-mail. it seems you couldn't get it. 

 if your can give us more perfessional ideals about this, it's great help for us.

Howard,

Your most recent testing is useful.  You have recognized that the additional frequency components can be coming from the power supply or from external clock sources.  I recommend that you continue with this testing by using high precision test equipment to provide a very low jitter clock to either prove or disprove this as the source.  Similarly, while using a very low jitter clock source, you can then provide power to the device from clean bench supplies, if needed.  Please perform the tests using a very low jitter clock and post the results for review and discussion.

What is the level of the parasitic frequencies / phase noise?  What level of spectral purity do you require?

Tom

Hi Tom,

Thank you for your reply.

I want to use TI demo board for our control system and analsye the test result. i need one or two days to change the hard ware  design and do the test. if i have the result, i will share with you.

At the moment, i can't give you the leve of the parasitic frequencies or spectral purity, we didn't get any information about the similiar system for reference. But we can give your our test result is acceptable or not.

I can show your latest test result by CHUANGLONG's board, the below picture i captured is the load voltage. you can see the FFT ananlyse, the even-order harmonic shouldn't comes out from the ground noise and the odd harmonic shouldn't aliasing so big low frequency modulation signal..

I don't know if you have meet the same phenomenon before. Do you have the related data sheet for clock jitter or phase noise about the DSP?

Best wishes,

Howard

Howard,

The OMAP-L138/C6748 LC Dev Kit is not designed for low-jitter.  It is a general-purpose development platform.  If you need very low jitter, you will need a board designed with very clean power and low-jitter clock sources.

The signal processing code can also be a source of jitter depending on the precision of the numbers and calculations.  Has this also been considered in the system design?

Tom

Hi Tom,

Thank you for your information. Yes, as you said, We designed a power board for the OPAP-L138/C6748 LC Dev Kit and also buy temperature-compensation crystal oscillator for our test. We can change better power and oscillator to improve the test condition. We believe that the board your designed is more perfessional than our supplier or ourself. We can get the test result soon.

But for the signal processing code, we only config the related registor to generate the PWM signal. At the moment we don't evaluate the influence of the code. The code should be a way to improve our system. 

Could you help us to know how to write a code to avoid the unormal signals come out?

Thank you for your help!

Best regards,

Howard

Howard,

Numerical precision can have an effect on the spectral purity in some signal processing.  Use of extended precision fixed-point or double-precision floating point can provide the best results.  However, this comes at a cost of cycles and memory usage.  That is why I asked about you requirements.

Tom

Hi Tom,

Sorry for the delay. We used better oscillator for test and found the harmonic frequency also, the frequency become to bigger but not disappear. About the code,  we define almost all the variates to floating and store in flash, that should be no problem.

In current, it's not the best way to change the oscillator. May be i should improve the quality of the PWM singals. what about your idea? Can recommend us some chip to improve this? 

Thank you！

Howard

Howard,

I do not understand your most recent post.  Please explain more clearly.

Tom

Tom,

As i talked, we  changed the oscillator for the harmonic test. Even change better ocsillator, the harmonic of output signal improved only a little. The quality of output voltage didn't reached our expect.

So, we are going to improve the output signal with filter and logic chip, but the PWM singals will be changed.

We don't have any experience about this. If you can give us some advise, you can share with us.

Regards,

Howard

Howard,

Please provide details on your implementation:

1. What mode are you using for the PWM?  Symmetric or asymetric?
2. The PWM module has a prescalar.  What is the SYSCLK rate into the prescalar and the module clock rate out of the prescalar? 
3. What programming are you doing to generate the modulated PWM signal?  Do you have an ISR trigger each time the counter rolls over to load a new value?
4. How are you generating the sine wave shown in the plots previously posted?  Is this after the PWM output has been through a low-pass filter?

Tom

Tom,

My answers as below:

1. we chose the up-down mode, symmetric.

2. The systemclock we set to 456Mhz and the PWM module set to 456Mhz WITHOUT prescalar.

3. The new value load to compare register when the count number equel to period or zero.(two times a period)

4. The sine wave i posted was capture from the load of our system(H bridge, after low pass filter), your can see clear harmonic wave. the other picture is the signal come from DSP PWM IO, the two signals are before or after low pass filter. you can see the low pass filter lead to the green signal delay a little and the PWM signal changed, but the harmoinc is better than the signal without low pass filter.

BR,

Howard

Howard,

What is the frequency of the sine wave being generated?  What type of filter are you using?  How are you preventing digital noise currents in supply and ground from entering your analog signal?

Tom