Would like to boot TMS320C6746 DSP in SPI0 Slave Mode. DSP has latest ROM version.
Need to know what SPI mode the TI DSP expects the Master to be in to communicate with it whilst in SPI0 Slave mode.
There is a lot of confusing/conflicting data in application notes etc regarding this topic. I need some clarification
From Ti app note - SPRAAT2F - January 2014 : "All SPI Boot modes use the Chip select 0 signal"
Additionally, SPRAAT2F states "In the SPI boot modes, the received data is samples at the rising edge of the clock and the data to be
transmitted on the falling edge of the clock as shown in Figure 27 SPI Mode for communication" Pg 28 (SPRAAT2F)
This implies to me, spi slave mode 4-pin with Chip select Figure 6-40. SPI Timings Pg 172 from SPRS591F - Nov 2009 - Revised Jan 2017
This timing diagram (Fig 6-40) is not well correlated to the Slave Mode timing diagrams of the 'C6746 on pg 170 in the same document.
Master SPI interface connected to TI DSP (configured in SPI0 Slave mode) is configured as Motorola SPI Format with SPO = 1, SPH = 1 (SPI mode 3)
This works . This tends to suggest that the 'C6746 is operating in Slave Mode 2 (SPO = 1, SPH = 0)
Could someone confirm what SPI Mode that the 'C6746 Boot ROM upon power up in SPI0 Slave Boot mode configuration the 'C6746 SPI to be ?
I have already expended far too much time trying to ascertain this information, I would appreciate one's expert insight to close off this issue.
Thanks in advance,
Stuart