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SRIO
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  • Forum Post: Re: Serial Rapid I/O: Request for example code for bulk data transfers >4kiB (EVM6474)

    Dieter Landl
    Yes, I wondered too. But actually I've rewritten the example code. Now buffers from external memory of DSP-A are transfered to external memory of DSP-B by means of LSU-transfers and without any extra EDMA coding (i.e. all necessary EDMA is done by SRIO!). As the first reply shows, just change...
    on Jun 9, 2009

  • Forum Post: Serial Rapid I/O: Request for example code for bulk data transfers >4kiB (EVM6474)

    Dieter Landl
    With the EVM6474 kit some examples for SRIO transfers are delivered. All the examples support only transfer sizes of up to 4096 byte (with origin in internal memory). Are there any Serial Rapid I/O examples for transferring more than 4096 byte, let's say some MegaByte with source and destination...
    on Mar 25, 2009

  • Forum Post: Re: SRIO Message Passing on C6455

    RandyP
    Attached is EVM6455_SRIO_MSGQ.zip which has an example for using SRIO through the DSP/BIOS MSGQ tool. You will need to have the DDK installed and the latest version of BIOS would be good. I am using BIOS 5.31.09. The steps to run this example are: Unzip this into your CCS 3.3 MyProjects folder...
    on Sep 18, 2009

  • Forum Post: SRIO boot problem

    sungyi chen
    To whom might concern, I was trying to boot TCI6486 by SRIO boot mode. I could load DSP image by SRIO and boot CPU1~CPU5 successfully. I set a boot.asm to jump to _c_int00 at address 0x10200000 and set boot_start address and BOOT_COMPLETE_STAT. Set (boot_start address) 0x10200000 into (DSP_BOOT_ADDR1...
    on Nov 10, 2009

  • Forum Post: SRIO SYSTEM RESET

    Mehly
    Hi, i want to trigger a system reset in the C6474 DSP. How can i generate an doorbell interrupt to SRIO INT#6 with the CSL? Thanks.
    on Nov 18, 2009

  • Forum Post: SRIO Error observed during NWRITE_R operation

    Aradhana Kumar
    Hi, I am using TMS320TCi6482 DSP with SRIO as bootloader option. Our software use SRIO NWRITE_R operation to write to another processor (Power Quicc 3). I am using LSU register set 2 for this. Every 20 millisecond, 2 MB of data is pumped through SRIO towards PQ. There is a SRIO switch in between....
    on Feb 11, 2010

  • Forum Post: Re: SRIO Error observed during NWRITE_R operation

    Aradhana Kumar
    Thanks Randy. Following are the register values at the time of error: LSU2_REG0 : [0x0], LSU2_REG1: [0x3a01fc5c], LSU2_REG2: [0xe6061c5c], LSU2_REG3: [0x3], LSU2_REG4: [0x0], LSU2_REG5: [0xff55], LSU2_REG6: [0x8] I am not able to find how 64-bit aligned RIO address is calculated. If we know...
    on Feb 13, 2010

  • Forum Post: Re: SRIO register setting problem

    Bo47416
    Hi, Travis, I have a question about SRIO initialization on TCI6488. I'm using the file you attached. After CSL_srioHwSetup(), the ENTX bit in SERDES_CFGTXn_CNTL is always 0, it means that the transmitter is disable, but the ENRX bit in SERDES_CFGRXn_CNTL is 1. I also tried the code slice from...
    on Apr 12, 2010

  • Forum Post: Re: Compact Optomized SRIO Boot loader for 6455

    Tim49547
    Herb was trying to post the question from me as a favor and the question got a little garbled in translation. What really is needed is a smaller TCP/IP stack for a TFTP bootloader. We are using a 6455 evm and trying to boot the mezzanine by TFTP, however the I2C ROM is only 128KB which is a tad smaller...
    on May 3, 2010

  • Forum Post: Example code for bulk data transfer C6457

    Yariv Hayoun
    In extension to the question Re: Serial Rapid I/O: Request for example code for bulk data transfers >4kiB (EVM6474) which were submitted in this forum, I'm intrested in examples for the C6457 DSP as it lack from examples regard SRIO (even for blocks less than 4KiB) . There is a big probablity...
    on Jun 7, 2010

  • Forum Post: TCI6486 EVM SRIO CSL external loopback fail

    sungyi chen
    I am trying to implement SRIO post function for TCI6486 EVM board but it seems not working for SRIO external loopback. SRIO loopback example is working for both TCI6486 post and TCI6486 CSL SRIO loopback example but external loopback function is failed. It seems SRIO register setting conflict for...
    on Sep 10, 2009

  • Forum Post: Re: How does the doorbell initiate an interrupt?

    monster53781
    hi there, in the srio document 976c,the anthor says,the rapidio has 8 interrupt destinations,what the interrupt destinations exactly mean? BR
    on Jul 23, 2010

  • Forum Post: How does the doorbell initiate an interrupt?

    monster53781
    i'm working with srio for few weeks,and puzzled by doorbell of srio, the problem is after the master send a doorbell packet to slave, and a "done" response has been received,i mapped event ID 20(defined as rapidIO interrupt 0) to cpu interrupt 4,and associated with a interrupt sevice routine...
    on Jul 21, 2010

  • Forum Post: SRIO register setting problem

    sungyi chen
    To whom might concern, We tried to connect DSPs by SRIO but it was failed at “port0 was uninitialized”. For our target board, RIOCLK is 125Mhz and TX/RX line rate is 1.25Ghz with 1x mode. 1. We followed “SPRUE13E” instruction and tried to co figurate the register field...
    on Oct 9, 2009

  • Forum Post: 6457 SRIO CPPI (Message Passing) Problem

    eran peled
    Hello , I am using an 6457 dual CPU EVM. I have succeeded to perform DirectIO transactions, but with message passing (CPPI operation) I am having some problems. The attached code is running on both the CPUs simultaneously. The problem is that the messages are not sent from DSP1 to DSP2 and...
    on Nov 24, 2010

  • Forum Post: sRIO Message Passing on EVM6455(DSP\BIOS 5.41.x CCS4)

    Juyoung
    Hi there. I just started with C6455 EVM. I'v got SRIO Direct IO working using example code. And I want use MSGQ with DSP/BIOS for 2DSP(C6455 to C6455). Of course, I read this thread( http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/112/p/11544/45009.aspx#45009 ) But RandyP...
    on Feb 9, 2011

  • Forum Post: C6457 SRIO series termination

    Bryan Busacco
    For SRIO output signals on the C6457 DSP, we were going to connect through a series resistor in the event we need to add series termination. Connection path as follows: DSP output on daughter card -> Series Resistor (currently 0Ω) -> Daughter Board Connector -> Altera Device on main board...
    on Mar 18, 2011

  • Forum Post: C6457 board routing and layout questions, SERDES and DDR.

    Bryan Busacco
    C6457 board routing and layout questions, SERDES and DDR. We are going to be using the TMS320C6457CGMH2 DSP. SERDES implementation guide spraay1a.pdf Section 2.2 table 2 gives a minimum trace width of of 4mils for a 10inch trace. We are going to limit the trace length to 4inches or less. Can we use...
    on Mar 21, 2011

  • Forum Post: Re: C6455 srio problem

    tscheck
    Richard, In the C6455 DSP, the reasons we send a Error message response is: * An ERROR response is sent if the RX message is too big for the allotted buffer sizes - Subsequent ERROR responses will be sent for all segments of that message * An ERROR response is sent if the mailbox/letter is not...
    on Mar 29, 2011

  • Forum Post: Re: SRIO NWRITE "Unavailable Outbound Credit"

    tscheck
    Matt, I don't know that I would use the word normal, because it depends on a lot of factors and may not happen in every case. However, it can happen and yes software should be able to handle it. It shouldn't be considered an error. As a matter of fact, the reason this approach was taken in...
    on Mar 30, 2011

  • Forum Post: SRIO NWRITE "Unavailable Outbound Credit"

    MattB
    Hi, I regularly get an error status after attempting an NWRITE. I've found that spacing out the NWRITEs helps but placing an arbitrary delay of a few hundred cycles between NWRITEs doesn't feel like a very good long term solution! Here's what I've tried to do: Prepare 8...
    on Oct 29, 2010

  • Forum Post: c6455 SRIO loopback

    hong ma71853
    Hi all! I am trying to test the c6455 srio loopback funtion,the transaction i tested is nwriteR. The problem is that the transaction always ends with timeout error,means that the response is not loopbacked successfully.But what i read in spru976,the loopback mode means that packet data is looped back...
    on Apr 19, 2011

  • Forum Post: C6457 SRIO board routing

    Bryan Busacco
    With arespect to board layout on a design that includes the C6457 DSP, we have questions regarding SRIO BGA double trace escapes. There is a recommendation of 1.7mil traces spaced 1.7mils. Our circuit board fabrication facility has been questioning of these values. (spru811a sheet 21 ) Does TI have...
    on Mar 29, 2011

  • Forum Post: Re: C6455 srio register settings are inconsistent?

    tscheck
    Erik, If port_ok is set, it means the link partners are successfully exchanging idles and control symbols, which is good. I don't think it is related to the clock, the fact that all devices are using the same reference is a plus to. Your multiply settings are correct, but I did notice that you...
    on Jul 14, 2011

  • Forum Post: EVMC6474 SRIO interrupt

    Chester
    I modify the example to make srio generate interrupt to CPU, but it seems not to work, please help me, thank you! Best regard, (Please visit the site to view this file) Chester
    on Aug 19, 2011
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