Well, it seems there is still an error (likely again between keyboard and chair, but this time I can't seem to find it).
I did succeed in booting the C6748 SOM on the EVM and running the keystone example from IRAM. I even succeed in configuring PLL0, PLL1 and DDR in AISgen and booting and running the example from IRAM. However, as soon as I place the code section (.text) in DDR, the program won't run anymore. If I connect the debugger, the CPU is stuck at 0x11804408 (BNOP.S1):
SYS_EXITFXN, UTL_halt:0x11804400: 01BC54F7 STW.D2T2 B3,*SP--[2]0x11804404: 1FFF7812 || CALLP.S2 _HWI_disable (PC-1088 = 0x11803fc0),B3 C$L1:0x11804408: 0002A120 BNOP.S1 C$L1 (PC+8 = 0x11804408),50x1180440C: 00000000 NOP0x11804410: 00000000 NOP0x11804414: 00000000 NOP0x11804418: 00000000 NOP0x1180441C: 00000000 NOP CLK_TIMEFXN, CLK_F_gethtime, _CLK_gethtime:
My AISgen config file is: , my tcf file is: , and the generated bin file is: . (Remove .jpg extensions from files.)
Any help is appreciated!
Admar
At a minimum you need to tell me which power domain is being transitioned that gets stuck. If your code does anything to interfere with the DDR that will almost certainly break things. For example, you should NOT be doing any manipulations of the PLLs or DDR configuration.
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the condition we use is the following, that initialises uart2, and we boot from uart:
EVMC6748_lpscTransition(PSC1, DOMAIN0, LPSC_UART2, PSC_ENABLE);
Should we have observed the same behaviour when the code is loaded in the IRAM? and if so why is that?
I don't see any obvious reason why that function would behave different when executing from DDR vs IRAM. I expect the issue is somewhere else. What else is different between the two cases?
Dear Brad,
There are no other differences between the two cases. we modifiy the load memory of the executble (.text section) code in the command linker file.
George,
You need to poke around and figure out what's going on. For example:
Brad