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Digital Signal Processors (DSP)
C6000 Single Core DSP
C67x Single Core DSP Forum
Bootloader for TMS320C6722
I'm beginner. Faced with the need to write programs for the TMS320C6722.
My board has external FLASH, connected to the CPU via EMIF. (Internal FLASH, I realized, the CPU does not have)
I read that the ROM has the primary bootloader, which loads into RAM the secondary user's bootloader, and it's loads to RAM the rest of the user program.
Question is. Do I have to write this secondary bootloader itself? Whether the problem is solved automatically by using OS DSP / BIOS?If so, how to connect the OS to TMS320C6722 ?
I have CodeComposerStudio v.5.1. Can I decide upload programs into RAM as part of the software without having to write myself a secondary bootloader?
And the last question. Will CCS.5 download my application program to the externalFLASH (via EMIF) by the programmer-emulator XDS560?Thank you, Alexander.
Follow all in this link and you will be able to apply it to your C6722 design. You just need to adapt to 2nd boot loader to the CPU.
Here is the C672x parallel FLASH boot description
"Once the bootloader detects EMIF boot mode, it reads the first byte from the flash device to determine 8
or 16 bit boot mode. The bootloader then sets the EMIF control registers for accessing 8 or 16 bits
according to the mode selected. The first 1024 bytes of data are copied from the FLASH memory into the
first 1kBytes of TMS320C672xx internal memory. The bootloader sets the program counter to 0x10000004
(offset of 0x4 in internal memory) and execution of code begins at this address. It is assumed that the first
1024 bytes of code/data contain a user defined secondary bootloader or other user application code that
will load/execute the application."
So your create a replacement 2nd BL that fit within a 1k space, where it init your chip EMIF for your code space, then copy the application form FLASH to destination, whether it is IRAM or SDRAM.
Trying work with CCSv5(Evaluation Lic) and TMS320C6722 I faced a problem of constructing of the secondary bootloader.First I got acquainted (how do I have advised) with the document SPRAA69D–September 2009 (Using the TMS320C672x Bootloader).This document advises to build the secondary bootloader by means of modules from library sprs203.zip (the modules TISecondaryBoot.h, TISecondaryBoot.c) and via configuration files, built by means of PERL-utility genBootCnfg and genAis.I was able to build configuration files by means of genBootCnfg and genAis.But I can not compile my project with modules TISecondaryBoot.h and TISecondaryBoot.c.Under direct inclusion these modules in my project CCSv5 makes TISecondaryBoot.objbut final file xxx.out does not form and there is the error-message.And when I turn in my project the module TISecondaryBoot.obj (excluding from it TISecondaryBoot.h And TISecondaryBoot.c)linker does not see announced in TISecondaryBoot.c segments .Tibootstrap and .TIBoot.Maybe it's because these segments are not called by my Main Project Modules andthere is a setting in CCS - "Eliminate sections not needed in the executable".But if I remove this setting the compiler generates an error and does not build my project correctly.What should I do?OK.Then I learned another document SPRA999A1 − May 2006 "Creating a Second-Level Bootloader for FLASHBootloading on TMS320C6000 Platform With Code Composer Studio"This document offers a very different approach to the construction of the secondary bootloader.But as an example, there is processor DSK6713.And I do not know whether this is a method to my CPU 6722.In addition. The document mentions the use of tools Flash.exe or Flashburn that generate .hex file for the firmware in Flash.But in my CCSv5.2(Evaluation Lic) no such tools. And I have been unable to download them.Even for the money.What should I do?Thank's. Alexander
I would like one of the TIers to step up for this.
Sorry, I don't understand what you say.
About what TIers you're talking?
That will be one of the TI employees responsible for supporting this product line.
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