i am doing a sppech processing project using TMS320c6713 dsk.,before staring the actul project i tried to run the code given below( from rulpha chassing book)I attatched all the following files c6713dskinit.c,c6713dskinit.h,rts6700lib,dsk6713bsl.libcsl6713.lib,vectors_intr.asm and hello.cmd(using ccs version 3.0).the project was copmiled and built without any errors..I connected signal generator to linein and oscilloscope to line out,but didnot get anything on CRO neither on output window of ccs(RUNNING was being dislayed).Please tell me what is the problem.
#include "bs2700.cof" //coefficient file
#include "dsk6713_aic23.h" //codec-dsk support file
Uint32 fs=DSK6713_AIC23_FREQ_8KHZ; //set sampling rate
int yn = 0; //initialize filter's output
short dly[N]; //delay samples
interrupt void c_int11() //ISR
dly=input_sample(); //input newest sample
yn = 0; //initialize filter's output
for (i = 0; i< N; i++)
yn += (h[i] * dly[i]); //y(n) += h(i)* x(n-i)
for (i = N-1; i > 0; i--) //starting @ end of buffer
dly[i] = dly[i-1]; //update delays with data move
output_sample(yn >> 15); //scale output filter sample
comm_intr(); //init DSK, codec, McBSP
while(1); //infinite loop
What is CRO?
Put a breakpoint in the ISR and see if you ever get there.
Take a look at the assembly for the while(1) loop. If it is too tight, you might never get interrupts. But if you compiled with Debug Configuration (recommended for now for debugging) then it is probably not too tight. Too tight means it is a 6-cycle or smaller loop that might not be interruptible.
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