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Salamat,

Please post a zip of this project for review.  Meantime make certain the FLASH is connected to you hardware POR.

Good Luck,

Sam,

Thanks for reply.

The flash is properly connected with hardware as I have verified this by writing/reading from flash.

I have attached the complete project folder for review.

7318.TestC6713.rar

Thanks,

Usman.

Salamat,

While I review details, I assume you have seen this

EMIF boot (using default ROM timings)

Upon the release of internal reset, the 1K-Byte ROM code located in the beginning of CE1 is copied to address 0 by the EDMA using the default ROM timings, while the CPU is internally “stalled”. The data should be stored in the endian format that the system is using. The boot process also lets you choose the width of the ROM. In this case, the EMIF automatically assembles consecutive 8-bit bytes or 16-bit half-words to form the 32-bit instruction words to be copied. The transfer is automatically done by the EDMA as a single-frame block transfer from the ROM to address 0. After completion of the block transfer, the CPU is released from the “stalled” state and start running from address 0.

Salamat,

I think you will need to change your link control memory map to

MEMORY

{

     boot:          o = 00000000h   l = 00000400h

     vecs:          o = 00000400h   l = 00000200h

     IRAM:          o = 00000600h   l = 0000FA00h

    CE0:           o = 80000000h   l = 01000000h

}  

Sam,

I have read this and I have done these changes and after that it did not work even on dsk6713.

Regards,

Usman.

Salamat,

I suggest you boot your hardware with CCS without any GEL and view what the EDMA copy to IRAM after reset.  Following the link map I sent you, you should see your code at 0 where the boot-loader, and you should be able to step through all the way until it transfer control to _c_int00.

Good Luck,

Sam,

On dsk6713 I have observed the values of dsp core registers during the boot up process they seems to be right.

But when I did the same for my custom board then during the boot up procedure values of dsp core registers were wrong and hence the dsp could not went  to the exact _c_int00 value.

Regards,

Muhammad Usman.

Grtns,

Once you reset CPU via CCS with no GEL, your dis-assembly window will show you what is in IRAM.  Did you see your code there?  You may have an endianness issue, or a FLASH access issue.

Clarify that your boot-loader code is there after reset, otherwise it will not work.

Good Luck,

Sam,

I have done the above steps mentioned by you and I am unable to see the code in IRAM.

I am not sure about the endianness issue because my flash programmer does not have any option like this.

Thanks,

-Usman

Salamat,

When you do not see your code in IRAM, it means the EDMA did not do what is expected at RESET, per description.

Endianness is done by the use-case of hex6x. There are tools provided by Spectrum Digital to burn your FLASH using CCS.

I asked this before.  Do you have your FLASH reset line tied to your CPU Reset?

Many signal need to be at certain level to direct the CPU boot mode.

Good Luck,