All docs and examples for DSK6713 are for CCS 3.1, which appears to not even be supported anymore(?) I have downloaded CCS 5.2 and spent considerable time tryng to figure out how to use it but to no avail. I tried importing examples from the DSK but get error msg about requiring sys/bios not installed, but as far as I can tell it is installed. I have searched but cannot find a step by step guide and recommendation for how to update the DSK, I assume there is one somewhere, I hope?
My intended application is very simple, perhaps you can also help me find an example. I simply need to read a/d converters through spi port at periodic interval (on a board I am designing), such as with a timer ISR, which stores results to a ring buffer, then perform math such as averaging and FFT on data and transmit some results out another spi port. No dynamic memory mgmt needed, everything static except local stack. Very simple app, no OS or bios needed, just some startup code for setting chip registers and one or two timer ISR's and a main program loop. Can you point me to a simple example similar to this? I am accustomed to working with assembly and C files for startup code in various board-support packages for other processors, the concept of gel file is new to me, which may be part of the reason I am having difficulty here.
Steve,
Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages and also find time to offer your advice to others. Be sure to search for helpful information and to browse for the questions others may have asked on similar topics.
I am curious why you chose the DSK6713 for a new program. I know there is a lot of use of existing boards in universities around the world, but for new designs we have newer devices that I would have expected to be more attractive to you. Just a curiosity, if you have an interest in commenting.
I do not know why SYS/BIOS would be involved in a migration from a CCS 3.3 project that did not use SYS/BIOS. But DSP/BIOS would be useful for you to get your project going quickly, in my opinion.
Please search the Wiki for something on "migrating to CCSv5" (no quotes). The import process is not perfect, but it helps. I definitely recommend you move to CCSv5 in the long run.
There is a training class archived on the Wiki named IW6000 and it includes some labs and solutions for the DSK6713. It also uses CCS 3.x, so it will not help with the migration to CCSv5, but it will give you some insights into use of resources like timers and serial ports.
This has been a lot of comments, so please let me know what helps and what is missing.
Regards,RandyP
Search for answers, Ask a question, click Verify when complete, Help others, Learn more.
Randy,
"I am curious why you chose the DSK6713 for a new program. I know there is a lot of use of existing boards in universities around the world, but for new designs we have newer devices that I would have expected to be more attractive to you. Just a curiosity, if you have an interest in commenting."
To answer your question, I started at your main dsp website and followed it's recommendations. From your website it appeared the 6713 was the best fit for my needs. There was no warning of any kind saying "this is old part only used by university students". And yes I was shocked when I received my board and the date stamped on the CD was 2005! Perhaps you can include this information on your web pages to help others not make the same mistake I made.
Since that time I talked to a friend who is using ti dsp's, he had used a 6713 before, now is using 6747. When I looked at 6747 specs I decided it would be better for my needs. The reason I did not see it in my earlier search, is because it is not included with the 6000 series dsp's. The website has it in a completely separate category called low power dsp. I did not bother even looking there because flops/sec is my priority, not power, and in my experience lower power always means lower processing performance. However in this case is does not! You really need to include the 6747 in with the regular 6000 series!
In talking with Spectrum Digital it appears the 6747 dsk also comes with CCS v3.x. Is this also a university project part? I would much appreciate some guidance, it would be very helpful to talk with a ti dsp fae on the phone, if per chance you can refer one to me.
The reason I asked about the 6713, is that is the hardware I currently have. My thinking is that perhaps it is close enough to the 6747 architecture that I can just use it to start work on my app. I am part of the way through a board design using the 6747 patterned after the 6747 dsk hardware which seems straightforward, but before I order prototypes built I want to be comfortable with bringing up the reference board so that I can be confident that my board will come up without problems.
I am in Utah, there used to be a TI rep based here but apparently no longer. Not having a rep to advise me makes this much more difficult. Again, any suggestions or guidance you can provide is appreciated.
Thanks,
Steve
Grtns,
All C67x and C67x+ EVM/DSK vendors are stuck with CCS3.x. It will be your first task to obtain current CCS5.x and migrate all third party provided software to it.
Yes you will be better suited to use C6727 than C6713. Better off using the C6748 (not C6747) in place. Even better going to the C667x but that will be at a cost for you now since you already procured your C6713 DSK.
You can stick with what you have, and get a CCS3.3 upgrade, since you should be a registered owner of what you got with the DSK.
One big benefit for that, if you are going to use Matlab/Simulink, is that it is not yet operable with Eclipse based CCS 5.x (last I checked), but has very mature interface to the C6713 DSK under CCS3.x.
Good Luck,
And for a custom design, I suggest you use C6748 after you get very well familiar with its muxed pin-outs, to ascertain that all the peripherals I/O pins you desire to use can be made available via its compact package.
Thank you very much for your comments on the search experience. This will definitely be forwarded to our marketing people to understand how the search process is misdirecting people who try to do intelligent searches. Your feedback is much more convincing to them than mine.
I will second Sam Kuzbary's comments on the C6748 over the C6747. The mix of peripherals and external memory (C6747 uses SDRAM, C6748 uses DDR2) would be the primary deciding factors between the two, and if those do not matter, the C6748 has a lot more experience base. Our latest live Technical Training Workshops use the C6748 as the base board for the labs, so you can go online to read that training material and download the labs and solutions. These exist for CCSv5 and SYS/BIOS, so you will be at the top of the TI tool support chain.
The C6748 offers a very good price point for the performance that it delivers. If you need more performance than that, then you can move up the DSP food chain to the C66x-based processors. The first devices to look at there would be C6654/55/57 for cost/performance/dual-core (resp.), and then for much more performance you can move to the C6671/2/4/8 for more 1GHz+ cores in a single device. All of these support DDR3 external memory.
There are a variety of low-cost EVMs available. The choice may come down to what peripherals you need on the EVM and what memory options you want.
Our Authorized Distributors also have DSP FAEs who can help you with locating evaluation boards and making processor tradeoffs.
Thank you for the response, and Sam also, they were quite helpful. If I may, I wish to ask for your help just a little bit more. I will list the things I am looking for in my current project, please read through these and then give me what you think would be my best course to follow.
My project is to add real time data analysis capability to an existing product used for measuring weight and vibration in a unique niche market. I intend to sample 8 channels of 16-bit adc at around 2000 samples/sec, and provide some real time data such as moving averages and FFT on 0 - 100 Hz range. I think this is not all that demanding and likely could be easily handled by 300MHz sdram part such as 6713 or 6747. Let me know if you agree.
My local disty FAE has suggested C2000 series, however 512KB ram appears to be upper limit, I am concerned it may not be enough. I have been thinking 1MB as minimum ram, mostly for analog data buffers.
A main goal is short development time. I am one man show on this project. Ideally working from a reference design I would like schematic design in 3 wks, pcb layout another 3 wks, and firmware development 3 - 4 wks, at the end of which I would receive my prototype boards, bring them up within a couple of days and start testing. Obviously the key to coming anywhere close to this schedule is a reference platform with example code that closely matches what I need. Honestly if I could use the 6713 DSK as-is I think I could come close. It has a very simple example ping-pong app that looks like could work as a base for my app, I had planned to add the TI dsp library to perform FFT. The shift to CCS 5.x is huge time obstacle for me right now.
My project needs firmware update capability over slow uart, thus my firmware code size needs to stay small, less than 50KB would be good, otherwise the update time is very long and annoying, customers would hate it. This is one reason I prefer to have no OS, also learning a new OS would take more time for me.
I prefer to stay at SDR ram or slower to keep board design time short and simple, as well as cheaper and better availability of SDR vs DDR for me. This is assuming it is fast enough for my needs, which I think it will be. This is why I am looking at '47 instead of '48, however your point about the '48 having more experience base is interesting.
I am seriously thinking that my best course may be to get the CCS 3.3 update so that I can use the 6747 example code (the ping pong app), and just use the 3.3 for my own board as well, for now. I have no problem buying more reference platforms, they are very cheap in the whole scheme of things compared to development time.
With that, any thoughtful advice you can give is much appreciated.
Thank you for your time!
Best Regards,
I hope my friend Randy agree with me. I suggest you borrow a C6727 PADK platform from your local TI FAE (CA or CO) to evolve your algorithm while you design yur custom hardware using the C6748.
You can start with CCS3.3 using the PADK, while your sight is placed on the CCS5.x. I favor 3.3 control and appreciate 5.x features, but I can not have both in the same, so I use both under VMWare control.
Good luck,
Further more, DDR or SDRAM, the C6748 is more mature for your use. Place a boot block , and an app in its EMIF based FLASH, and only update your App, while you cut the UART overhead.
We have done that for a large clientele of TI already, using the C6748 and its 115200BPS based umbilical cord.
Good Luck and let us know if we can be of any further help,
Correction to my previous comment - in trying to import an example from CCS 3.1 to CCS 5.2, the error msg is as follows:
<<!ERROR: This project has DSP/BIOS content, but no DSP/BIOS tools are currently installed. Please install DSP/BIOS tools and re-migrate this project.>>
Previously I had said the error was that SYS/BIOS not installed, but actually it is that DSP/BIOS is not installed (SYS/BIOS is installed). The error msg instructs me to install DSP/BIOS and re-migrate. Is this correct? Or would it be better to somehow modify the project to use SYS/BIOS instead of DSP/BIOS?
One other detail, the CCS 5.2 import menu text is "Import Legacy CCS v3.3 project", however mine are CCS 3.1 projects from the 6713 DSK.
Hi Sam,
I will try to contact one of the TI FAE's you have suggested. Thanks for your suggestions on the 6748, I will look at going that direction.
Current CCS 5.2.1.000xx should have installed for you DSP/BIOS and SYS/BIOS. I really suggest you not spin wheels on CCS 5.x for now. Get going with the 3.x you got, while you focus your effort on the C6748 based HW design. It will all come into play for you. Just watch how you desire to start your system with. i.e. your boot mode.
Randy or my self can help. Let us know.
Oops,
I am so saturated with the use-case of the MCDSK. You should be able to dnld any DSP/BIOS into your CCS5.x install. Please forgive my oversight.
I had a look at the 6748, in so doing remembered that I had looked at it before and chose the 6747 over it, here are the main reasons why:
- 6748 is 361 bga pkg, 6747 is 256 bga pkg, easier for mfg, wider pitch and fewer balls to deal with
- 6748 is only 16 bit sdram support, 6747 is 32 bit sdram, since I am using sdram this is important
One other thing I hadn't considered before, the 6747 reference design comes with CCS 3.3, whereas 6748 appears to come with CCS 4. I really like your suggestion to not spin my wheels on CCS 5.x for now and just focus on CCS 3.x. I am thinking I don't want to mess with CCS 4 either right now. It seems my best choice is to order the 6747 reference design that should come with CCS 3.3, that will move me from 3.1 and also give me correct hardware.
Sam I appreciate your help, and I hope I am not coming across as arguementative, that is not my intent. I just want to make best decision that I can. Are there some other considerations that I am overlooking on the 6748?
The L137/C6747 was the first of this family with few early bird oversights. If the device I/O muxing can suit your apps, and after you become well aware of its Silicon Errata, go for it knowing that there is a significantly larger knowledge base for the L138/C6748 over the L137/C6747.
In my history of use-case for this family, I went from the C6711->C6727->C6748 and dropped the C6747 even though my friends at SD historically done very good DSK designs and for LogicPD it was the first.
BTW,
SDRAM product lines almost vanished, and what is available will cost premium $ in production of a new design nowadays.
Also, if the PS/DS of a design overflow the size of available internal high/full speed RAM, one will need to use L1P/L1D/L2 cache to attempt to reach CPU performance, hence the port bit width is of a very reduced effect, and with that the case, compulsory cache misses have major effect on data access. L1P and L1D operate at the CPU rate, L2 is at 1/2 or 1/3 dependent on the core, while the SDRAM/DDR operating across many SCRs go down to 1/6 or 1/8 at minimum.