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TI Home » TI E2E Community » Support Forums » Digital Signal Processors (DSP) » C6000 Single Core DSP » C67x Single Core DSP Forum » Questions about interrupts.
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Questions about interrupts.

Questions about interrupts.

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Umar Khan
Posted by Umar Khan
on Aug 02 2012 17:41 PM
Intellectual320 points

Hi,   

I have two basic questions about interrupts,

1) Is there any way to tell if my interrupt service routine is running late? i.e the code in the routine is too slow and interrupt gets triggered while the code in it is still running due to the previous triggering of the interrupt.

2) Is there any way to run interrupts or periodic functions if there is an infinite while loop running in the main function?

Best regards,

                          Umar Khan

Best regards,

                            Umar Khan.

interrupts slow ISRs while loop
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  • Sam Kuzbary
    Posted by Sam Kuzbary
    on Aug 04 2012 17:20 PM
    Expert2655 points

    Grtns,

    For Q1.  You should be able to profile your HWI ISR execution to determine if it is overflowing its HWI rate.

    For Q2.  Because they are HWIs, they have the highest priorities over anything else, and should come to life when their hardware event is posted, unless their corresponding interrupt enable is disabled, or the global CPU interrupt is disabled.

    There is plenty of training material that will enlighten you on how to do that in your design.

    Good Luck,

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  • RandyP
    Posted by RandyP
    on Aug 04 2012 22:33 PM
    Guru60130 points

    Umar Khan,

    Are you running an O/S?

    Which DSP are you using?

    If you go through one of our training classes (there are some archived online for self-paced use), you will be told to never do much processing in your ISR. You should do the minimum required at the ISR, such as capturing some input or sending some output and setting a control/signal flag or semaphore. Then you can do your processing outside of the ISR and be less susceptible to real-time concerns.

    Not everyone follows that advice, and sometimes for a good reason. But it is usually the best choice and easiest to support in the long run.

    Regards,
    RandyP

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  • Douglas Gwyn
    Posted by Douglas Gwyn
    on Aug 05 2012 00:36 AM
    Expert2060 points

    Another trick worth knowing is, right before the ISR returns, check the appropriate peripheral device register to see if more input is ready, and if it is then instead of returning from the ISR just to immediately get interrupted again, go ahead and jump back to the part of the ISR where data is captured into the user buffer.

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  • Umar Khan
    Posted by Umar Khan
    on Aug 06 2012 06:20 AM
    Intellectual320 points

    hello,

               I am using the TMS320C6713 DSK with Code Composer Studio 3.1 that runs on a Win 7 PC in XP Mode. Can you please provide me a few links for the training material. I am currently only aware of the IW6000.

    Best regards,

                                Umar Khan.

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  • RandyP
    Posted by RandyP
    on Aug 06 2012 06:52 AM
    Guru60130 points

    Umar Khan,

    For the C6713, IW6000 is the training material I would recommend. See Chapters 8 & 9 for discussion on real-time processing.

    Regards,
    RandyP

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  • Sam Kuzbary
    Posted by Sam Kuzbary
    on Aug 06 2012 06:56 AM
    Expert2655 points

    Grtns,

    From TI, http://processors.wiki.ti.com/index.php/TMS320C6000_DSP_Optimization_Workshop and http://focus.ti.com/docs/training/catalog/events/event.jhtml?sku=4DW102090

    Spectrum Digital provide a good set of examples.

    Third part books "DSP Applications Using C and the TMS320C6x DSK" and Digital Signal Processing and Applications with the C6713 and C6416 DSK" etc...

    Good Luck,

     

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  • Douglas Gwyn
    Posted by Douglas Gwyn
    on Aug 09 2012 01:07 AM
    Expert2060 points

    Ome thing to check is that your "infinite while loop" contains sufficient non-branch instructions so that interrupts aren't perpetually blocked by the 5 delay slots in each branch.  If you code just "while(1) ;" then interrupts cannot be serviced, because the generated assembly code is the equivalent of "HERE: BR HERE" which continually executes the next branch within 5 cycles of the previous branch, so execution is always within the delay slots of a branch, which is a condition during which pending interrupts are held up.

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