Hello everyone.
I’m having problems for capturing video imaging with my LCDK6748. I’m using Leopard Imaging camera (RAW RGB, 10 bit, progressive, 1920x1080, 30fps). I’m trying to capture video using both channel 0 and channel 1 as a single channel.
First let me describe my steps:
- I plugged the Leopard camera on the LCDK6748.
- I modified the vpif_loopback example (C6748 StarterWare v1.20.03.03) and I configured the camera by I2C commands (the commands were provided by Omnivision).
- The signals generated by the camera were received by the DSP (VSYNC, HSYNC, CLKIN0, CLKIN1, and DIN[0:11]).
- The configuration was correct (well I guess so), actually the interrupt service routine for the VPIF was attended (when a HSYNC is recived) .
But when I checked the image buffer… were empty!
The code is the follow:
#define HORIZONTAL_PIXEL_COUNT 1920
#define VERTICAL_PIXEL_COUNT 1080
#define VBUF_SIZE (HORIZONTAL_PIXEL_COUNT * VERTICAL_PIXEL_COUNT)
/* Buffer for the images */
unsigned short rawdata[VBUF_SIZE];
/* Global variables */
unsigned short verify=0;
unsigned int status;
/* Functions for CMOS sensor OV2715 */
void InitOV2715(void);
void TestPatternOV2715(void);
/* ISR for the VPIF */
static void VPIFIsr(void);
/* Initializes the I2C */
void InitI2c(void);
/* Initializes the VPIF interrupts */
void InitInt(void);
/* Initialize and configure the VPIF */
void InitVPIF(void);
int main(void)
{
/* Setting the Master priority for the VPIF and LCD DMA controllers to highest level */
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_MSTPRI1) &= 0x00FFFFFF;
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_MSTPRI2) &= 0x0FFFFFFF;
/* Set MAR bits and configure L1 cache */
CacheEnableMAR((unsigned int)0xC0000000, (unsigned int)0x10000000);
CacheEnable(L1PCFG_L1PMODE_32K | L1DCFG_L1DMODE_32K );
//Initializes the VPIF interrupts
InitInt();
//Initializes the I2C
InitI2c();
/* Initialize the Leopard Camera (OV2715) */
InitOV2715();
/* Test Pattern for the Leopard Camera (OV2715) */
TestPatternOV2715();
/* Initialize and configure the VPIF */
InitVPIF();
while (1)
{
}
}
static void VPIFIsr(void)
{
IntEventClear(SYS_INT_VPIF_INT);
status = VPIFInterruptStatus(SOC_VPIF_0_REGS, VPIF_FRAMEINT_CH0);
/* Initialize buffer addresses for the new frame*/
VPIFCaptureFBConfig(SOC_VPIF_0_REGS,VPIF_CHANNEL_0, VPIF_TOP_FIELD,
VPIF_LUMA, (unsigned int) rawdata, 2*HORIZONTAL_PIXEL_COUNT);
/* clear interrupt */
VPIFInterruptStatusClear(SOC_VPIF_0_REGS, VPIF_FRAMEINT_CH0);
if(status==1) //This part is just to check if this ISR is active
{
if(verify==65535) verify=0;
else verify++;
}
}
void InitVPIF(void)
{
/* Power on VPIF */
PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_VPIF,
PSC_POWERDOMAIN_ALWAYS_ON, PSC_MDCTL_NEXT_ENABLE);
/* Setup VPIF pinmux */
VPIFPinMuxSetup();
/* Disable interrupts */
VPIFInterruptDisable(SOC_VPIF_0_REGS,
VPIF_FRAMEINT_CH0 |VPIF_FRAMEINT_CH1 |
VPIF_FRAMEINT_CH2 | VPIF_FRAMEINT_CH3 | VPIF_ERROR_INT);
/* Disable capture ports */
VPIFCaptureChanenDisable(SOC_VPIF_0_REGS, VPIF_CHANNEL_1);
VPIFCaptureChanenDisable(SOC_VPIF_0_REGS, VPIF_CHANNEL_0);
/* CH0, CH1 frame interrupt: Top field V-sync only */
VPIFCaptureIntframeConfig(SOC_VPIF_0_REGS, VPIF_CHANNEL_0, VPIF_FRAME_INTERRUPT_TOP);
VPIFCaptureIntframeConfig(SOC_VPIF_0_REGS, VPIF_CHANNEL_1, VPIF_FRAME_INTERRUPT_TOP);
/* RAW mode */
VPIFCaptureCapmodeModeSelect(SOC_VPIF_0_REGS, VPIF_CHANNEL_0, VPIF_CAPTURE_RAW);
VPIFCaptureModeConfig(SOC_VPIF_0_REGS, VPIF_RAW, VPIF_CHANNEL_0, 0, (VPIFVbufParam*) 0);
VPIFCaptureCapmodeModeSelect(SOC_VPIF_0_REGS, VPIF_CHANNEL_1, VPIF_CAPTURE_RAW);
VPIFCaptureModeConfig(SOC_VPIF_0_REGS, VPIF_RAW, VPIF_CHANNEL_1, 0, (VPIFVbufParam*) 0);
/* 12 bit data */
VPIFCaptureRawDatawidthConfig(SOC_VPIF_0_REGS, VPIF_RAW_TWELVE_BPS);
/* Progressive capture */
VPIFCaptureIntrprogModeSelect(SOC_VPIF_0_REGS, VPIF_CHANNEL_0, VPIF_CAPTURE_PROGRESSIVE);
VPIFCaptureIntrprogModeSelect(SOC_VPIF_0_REGS, VPIF_CHANNEL_1, VPIF_CAPTURE_PROGRESSIVE);
VPIFDMARequestSizeConfig(SOC_VPIF_0_REGS, VPIF_REQSIZE_ONE_TWENTY_EIGHT);
VPIFEmulationControlSet(SOC_VPIF_0_REGS, VPIF_HALT);
/* Initialize buffer addresses for the frame*/ //FB Config
VPIFCaptureFBConfig(SOC_VPIF_0_REGS, VPIF_CHANNEL_0, VPIF_TOP_FIELD,
VPIF_LUMA, (unsigned int)rawdata, 2*HORIZONTAL_PIXEL_COUNT);
VPIFCaptureFieldframeModeSelect(SOC_VPIF_0_REGS,VPIF_FRAME_BASED);
/* Enable capture */
VPIFCaptureChanenEnable(SOC_VPIF_0_REGS, VPIF_CHANNEL_0);
VPIFCaptureChanenEnable(SOC_VPIF_0_REGS, VPIF_CHANNEL_1);
/* Enable interrupt FRAME0*/
VPIFInterruptEnable(SOC_VPIF_0_REGS, VPIF_FRAMEINT_CH0);
VPIFInterruptEnableClear(SOC_VPIF_0_REGS, VPIF_FRAMEINT_CH0 | VPIF_FRAMEINT_CH1 | VPIF_FRAMEINT_CH2 |
VPIF_FRAMEINT_CH3|VPIF_ERROR_INT);
VPIFInterruptEnableSet(SOC_VPIF_0_REGS, VPIF_FRAMEINT_CH0);
}
The registers and their values after VPIF configurations are as:
C0CTRL 0x20001405
C1CTRL 0x00000405
INTEN 0x00000001
INTSET 0x00000001
REQSIZE 0x00000080
C0TLUMA 0xC07E9000
C0IMGOFFSET 0x00000F00
C1TMULA 0x00000000
C1IMGOFFSER 0x00000000
Regarding with the value for the register C0TLUMA, well the address for the image bufferer (rawdata) is 0xC07E9000 (as demand the DSP datasheet). The rest of the registers are zeros.
Please, help me to capture video.
Thank you in advance.
By the way, an important problem with the LCDK6748 design: I had to remove the U27 (74LVC1G126DBV) because it was causing a problem with the Leopard Camera (regarding with the pixel clock).
