Hi
I am having issues with transmitting data on the Universal Parallel Port. I am pretty sure my issues lie with data alignment of my transmit buffer. Transmission works fine for me sometimes but when i make code changes and recompile it breaks even if the code changes are completely unrelated to my UPP tx code. I think when I recompile after making changes my TX buffer has moved to a new space in memory that is not 64bit aligned.
The devise DS states the following:
Window Address (UPxD0.ADDR) – The location in memory of the first byte in the data buffer. When
the uPP operates in receive mode, the DMA channel begins writing to this address as it takes incoming
data from the uPP I/O channel. When the uPP operates in transmit mode, the DMA channel begins
reading from this address and pass the data to the uPP I/O channel. The window address can reside
in any available memory space (including EMIF), but it must be aligned to a 64-bit boundary (that is,
the 3 LSBs must equal 0). Nonaligned addresses are automatically adjusted to a properly aligned
value when written to UPxD0.
I am using the line:
#pragma DATA_ALIGN(uppRadioTxBuffer, 8);
My hunch is is that this is not doing what I think it is.
The question is what do I need to do to ensure my upp buffer (uppRadioTxBuffer) is aligned to 64bit boundary every time I recompile the code?
Thanks
Tony
