Help with interrupt / sample based processing in McASP audio playback

Hi Sivaraj, Thanks a lot for the suggestions. I have been held up with some other project. I shall implement these changes you suggested.
Thanks for your time and help once again.

HI Siv,

I modified the code as suggested. I can get into the ISR, but the the codec always read 0...

I read the codec using 2 methods :

mybuff = McASPRxBufRead(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_RX);

CodecDataIn.UINT = ReadCodecData();

Anything missing ..?

Thank you

=====================================

///////////////////////////////////////////////////////////////////////
// Filename: LCDK_Support_DSP.c
//
// Synopsis: Functions to support basic initialization of the OMAP-L138
// hardware resources.
//
///////////////////////////////////////////////////////////////////////

#include "AIC3106.h"
#include "interrupt.h"
#include "soc_C6748.h"
#include "hw_syscfg0_C6748.h"
#include "lcdkC6748.h"
#include "codecif.h"
#include "mcasp.h"
#include "psc.h"
#include "aic31.h"
#include "DSP_Config.h"
#include "tistdtypes.h"
#include "OMAPL138_defines.h"
#include <c6x.h>

interrupt void McASPErrorIsr(void);
static void McASPErrorIntSetup(void);
static void McASPI2SConfigure(void);
interrupt void Codec_ISR();
void wait(Uint32 delay);
Uint32 ReadCodecData();
void WriteCodecData(Uint32);
Uint32 CheckForOverrun();
void EnableInterrupts();
Uint32 Init_AIC3106();

// Welch, Wright, & Morrow,
// Data is received as 2 16-bit words (left/right) packed into one
// 32-bit word. The union allows the data to be accessed as a single
// entity when transferring to and from the serial port, but still be
// able to manipulate the left and right channels independently.

#define LEFT 0
#define RIGHT 1

int mybuff;
float temp;

volatile union {
Uint32 UINT;
Int16 Channel[2];
} CodecDataIn, CodecDataOut;

/* AIC3106 codec address */
#define I2C_SLAVE_CODEC_AIC31 (0x18u)
/* Slot size to send/receive data */
#define SLOT_SIZE (16u)
/* Word size to send/receive data. Word size <= Slot size */
#define WORD_SIZE (16u)

/* Number of channels, L & R */
#define NUM_I2S_CHANNELS (2u)
#define I2S_SLOTS ((1 << NUM_I2S_CHANNELS) - 1)

#define INT_CHANNEL_I2C (2u)
#define SAMPLING_RATE (8000u)
#define INT_CHANNEL_MCASP (2u)
/* McASP Serializer for Receive */
#define MCASP_XSER_RX (14u)

/* McASP Serializer for Transmit */
#define MCASP_XSER_TX (13u)

/*
** Error ISR for McASP
*/
interrupt void McASPErrorIsr()
{
#ifdef _TMS320C6X
IntEventClear(SYS_INT_MCASP0_INT);
#else
IntSystemStatusClear(SYS_INT_MCASPINT);
#endif

; /* Perform any error handling here.*/
}

/*
** Sets up the error interrupts for McASP in AINTC
*/
static void McASPErrorIntSetup(void)
{
#ifdef _TMS320C6X
IntRegister(C674X_MASK_INT6, McASPErrorIsr);
IntEventMap(C674X_MASK_INT6, SYS_INT_MCASP0_INT);
IntEnable(C674X_MASK_INT6);
#else
/* Register the error ISR for McASP */
IntRegister(SYS_INT_MCASPINT, McASPErrorIsr);

IntChannelSet(SYS_INT_MCASPINT, INT_CHANNEL_MCASP);
IntSystemEnable(SYS_INT_MCASPINT);
#endif
}

/*
** Configures the McASP Transmit Section in I2S mode.
*/
static void McASPI2SConfigure(void)
{
//unsigned int sysIntNum = 0;
McASP* mcasp = McASP0_Base;

McASPRxReset(SOC_MCASP_0_CTRL_REGS);
McASPTxReset(SOC_MCASP_0_CTRL_REGS);

/* Enable the FIFOs for DMA transfer- Commented by Smita */
//McASPReadFifoEnable(SOC_MCASP_0_FIFO_REGS, 1, 1);
//McASPWriteFifoEnable(SOC_MCASP_0_FIFO_REGS, 1, 1);

/* Set I2S format in the transmitter/receiver format units */
//McASPRxFmtI2SSet(SOC_MCASP_0_CTRL_REGS, WORD_SIZE, SLOT_SIZE,
// MCASP_RX_MODE_DMA);// Commented by Smita
McASPRxFmtI2SSet(SOC_MCASP_0_CTRL_REGS, WORD_SIZE, SLOT_SIZE,
MCASP_RX_MODE_NON_DMA);//Modification by Smita
//McASPTxFmtI2SSet(SOC_MCASP_0_CTRL_REGS, WORD_SIZE, SLOT_SIZE,
// MCASP_TX_MODE_DMA);
McASPTxFmtI2SSet(SOC_MCASP_0_CTRL_REGS, WORD_SIZE, SLOT_SIZE,
MCASP_TX_MODE_NON_DMA);//Modification by Smita

/* Configure the frame sync. I2S shall work in TDM format with 2 slots */
McASPRxFrameSyncCfg(SOC_MCASP_0_CTRL_REGS, 2, MCASP_RX_FS_WIDTH_WORD,
MCASP_RX_FS_EXT_BEGIN_ON_RIS_EDGE);
McASPTxFrameSyncCfg(SOC_MCASP_0_CTRL_REGS, 2, MCASP_TX_FS_WIDTH_WORD,
MCASP_TX_FS_EXT_BEGIN_ON_RIS_EDGE);

/* configure the clock for receiver */
McASPRxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_EXTERNAL, 0, 0);
McASPRxClkPolaritySet(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_POL_RIS_EDGE);
McASPRxClkCheckConfig(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLKCHCK_DIV32,
0x00, 0xFF);

/* configure the clock for transmitter */
McASPTxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_EXTERNAL, 0, 0);
McASPTxClkPolaritySet(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_POL_FALL_EDGE);
McASPTxClkCheckConfig(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLKCHCK_DIV32,
0x00, 0xFF);

/* Enable synchronization of RX and TX sections */
McASPTxRxClkSyncEnable(SOC_MCASP_0_CTRL_REGS);

/* Enable the transmitter/receiver slots. I2S uses 2 slots */
McASPRxTimeSlotSet(SOC_MCASP_0_CTRL_REGS, I2S_SLOTS);
McASPTxTimeSlotSet(SOC_MCASP_0_CTRL_REGS, I2S_SLOTS);

/*
** Set the serializers, Currently only one serializer is set as
** transmitter and one serializer as receiver.
*/
McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_RX);
McASPSerializerTxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_TX);

/*
** Configure the McASP pins
** Input - Frame Sync, Clock and Serializer Rx
** Output - Serializer Tx is connected to the input of the codec
*/
McASPPinMcASPSet(SOC_MCASP_0_CTRL_REGS, 0xFFFFFFFF);
McASPPinDirOutputSet(SOC_MCASP_0_CTRL_REGS, MCASP_PIN_AXR(MCASP_XSER_TX));
McASPPinDirInputSet(SOC_MCASP_0_CTRL_REGS, MCASP_PIN_AFSX
| MCASP_PIN_ACLKX
| MCASP_PIN_AFSR
| MCASP_PIN_ACLKR
| MCASP_PIN_AXR(MCASP_XSER_RX));

/* Enable error interrupts for McASP */ //Commented by Smita Shekar
//McASPTxIntEnable(SOC_MCASP_0_CTRL_REGS, MCASP_TX_DMAERROR
// | MCASP_TX_CLKFAIL
// | MCASP_TX_SYNCERROR
// | MCASP_TX_UNDERRUN);

McASPTxIntEnable(SOC_MCASP_0_CTRL_REGS, MCASP_TX_DATAREADY | MCASP_TX_CLKFAIL
| MCASP_TX_SYNCERROR
| MCASP_TX_UNDERRUN);//Modified by Smita : MCASP_TX_DATAREADY

//McASPRxIntEnable(SOC_MCASP_0_CTRL_REGS, MCASP_RX_DMAERROR
// | MCASP_RX_CLKFAIL
// | MCASP_RX_SYNCERROR
// | MCASP_RX_OVERRUN);

McASPRxIntEnable(SOC_MCASP_0_CTRL_REGS, MCASP_RX_DATAREADY | MCASP_RX_CLKFAIL
| MCASP_RX_SYNCERROR
| MCASP_RX_OVERRUN);//Modified by Smita : MCASP_RX_DATAREADY

/* Start the clocks */
McASPRxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_EXTERNAL);
McASPTxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_EXTERNAL);

/* //Added by Smita , enable Tx and Rx McASP interrupts
mcasp->rintctl = 0x00000001; // overrun interrupt only
mcasp->xintctl = 0x00000020; // data interrupts

*/

/* Activate the serializers */
McASPRxSerActivate(SOC_MCASP_0_CTRL_REGS);
McASPTxSerActivate(SOC_MCASP_0_CTRL_REGS);

//Added by Smita Shekar

//Added by Smita for interrupt method
McASPTxBufWrite(SOC_MCASP_0_CTRL_REGS, 13, 0x0);

/* make sure that the XDATA bit is cleared to zero */
/*Additional Comment by Smita - On commenting/disabling the line below,
i am able to get INT12 in the Interrupt vector table (i.e control is transferred to ISR - Codec_ISR() ).
But values in L/R channel registers are zeros */
while(McASPTxStatusGet(SOC_MCASP_0_CTRL_REGS) & MCASP_TX_STAT_DATAREADY);

/* Activate the state machines */
McASPRxEnable(SOC_MCASP_0_CTRL_REGS);
McASPTxEnable(SOC_MCASP_0_CTRL_REGS);

}

#if 0
/*
** Activates the data transmission/reception
** The DMA parameters shall be ready before calling this function.- DMA not used - Added by Smita Shekar
*/
static void I2SDataTxRxActivate(void)
{
/* Start the clocks */
McASPRxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_EXTERNAL);
McASPTxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_EXTERNAL);

/* Enable EDMA for the transfer - Commented by Smita*/
//EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_CHA_MCASP0_RX,
// EDMA3_TRIG_MODE_EVENT);
//EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS,
// EDMA3_CHA_MCASP0_TX, EDMA3_TRIG_MODE_EVENT);

/* Activate the serializers */
McASPRxSerActivate(SOC_MCASP_0_CTRL_REGS);
McASPTxSerActivate(SOC_MCASP_0_CTRL_REGS);

/* make sure that the XDATA bit is cleared to zero */

while(McASPTxStatusGet(SOC_MCASP_0_CTRL_REGS) & MCASP_TX_STAT_DATAREADY);// -Commented by Smita -- UNCOMMENT LATER!

/* Activate the state machines */
McASPRxEnable(SOC_MCASP_0_CTRL_REGS);
McASPTxEnable(SOC_MCASP_0_CTRL_REGS);
}

#endif

int main(void)
{

/* Set up pin mux for I2C module 0 */
I2CPinMuxSetup(0);
McASPPinMuxSetup();

/* Power up the McASP module */
PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_MCASP0, PSC_POWERDOMAIN_ALWAYS_ON,
PSC_MDCTL_NEXT_ENABLE);

IntDSPINTCInit();

/* Initialize the I2C 0 interface for the codec AIC31 */
I2CCodecIfInit(SOC_I2C_0_REGS, INT_CHANNEL_I2C, I2C_SLAVE_CODEC_AIC31);

// Init_Interrupts();//welch -Commented Smita
McASPErrorIntSetup();
IntGlobalEnable(); // Commented Smita

if(!Init_AIC3106()) {
while(1); // stall on codec init failure
}

IntRegister(C674X_MASK_INT12, Codec_ISR);
IntEventMap(C674X_MASK_INT12, SYS_INT_MCASP0_INT);
IntEnable(C674X_MASK_INT12);

/* Configure the McASP for I2S */
McASPI2SConfigure();

EnableInterrupts(); //Added by Smita

while(1) {
;
}

}

void EnableInterrupts()
///////////////////////////////////////////////////////////////////////
// Purpose: Enables McASP interrupt
//
// Input: None
//
// Returns: Nothing
//
// Calls: Nothing
//
// Notes: None
///////////////////////////////////////////////////////////////////////
{
IER |= 0x1002; // enable McASP interrupt (12)
ICR = 0xffff; // clear all pending interrupts
CSR |= 1; // set GIE
}

void wait(Uint32 delay)
///////////////////////////////////////////////////////////////////////
// Purpose: Simple software delay loop
//
// Input: None
//
// Returns: Nothing
//
// Calls: Nothing
//
// Notes: None
///////////////////////////////////////////////////////////////////////
{
volatile Uint32 i;

for (i = 0;i < delay;i++)
;
}

Uint32 ReadCodecData()
///////////////////////////////////////////////////////////////////////
// Purpose: Read McASP receive data
//
// Input: None
//
// Returns: Data from McASP
//
// Calls: Nothing
//
// Notes: Assumes data is ready
///////////////////////////////////////////////////////////////////////
{
McASP *port = McASP0_Base;

return port->rbuf[14];
}

void WriteCodecData(Uint32 data)
///////////////////////////////////////////////////////////////////////
// Purpose: Write McASP transmit data
//
// Input: data - data to write to McASP
//
// Returns: Nothing
//
// Calls: Nothing
//
// Notes: Assumes transmitter is ready
///////////////////////////////////////////////////////////////////////
{
McASP *port = McASP0_Base;

port->xbuf[13] = data;
}

Uint32 CheckForOverrun()
///////////////////////////////////////////////////////////////////////
// Purpose: Check if a McASP overrun occurred and re-init McASP if so
//
// Input: None
//
// Returns: 1 if a McASP re-initt occurred, 0 otherwise
//
// Calls: Init_McASP0
//
// Notes: None
///////////////////////////////////////////////////////////////////////
{
McASP *port = McASP0_Base;

if(port->rstat & 1) { // receiver overrun error occurred (i.e. halted DSP)
//Init_McASP0(); // so reinitialize the McASP to recover
McASPI2SConfigure();
return 1;
}
return 0;
}

Uint32 Init_AIC3106()
///////////////////////////////////////////////////////////////////////
// Purpose: Performs initialization of the OMAP-L138's onboard codec
//
// Input: nFs - selects sample rate to use
//
// Returns: Nothing
//
// Calls: Reset_AIC3106, SetSampleRate_AIC3106, AIC3106_write_reg
//
// Notes: None
///////////////////////////////////////////////////////////////////////
{
//Added by Smita - Begin
volatile unsigned int delay = 0xFFF;

AIC31Reset(SOC_I2C_0_REGS);
while(delay--);

AIC31SampleRateConfig(SOC_I2C_0_REGS, AIC31_MODE_BOTH, SAMPLING_RATE);

/* Configure the data format and sampling rate */
AIC31DataConfig(SOC_I2C_0_REGS, AIC31_DATATYPE_I2S, SLOT_SIZE, 0);
AIC31SampleRateConfig(SOC_I2C_0_REGS, AIC31_MODE_BOTH, SAMPLING_RATE);

/* Initialize both ADC and DAC */
AIC31ADCInit(SOC_I2C_0_REGS);
AIC31DACInit(SOC_I2C_0_REGS);

return 1;
}

interrupt void Codec_ISR()
///////////////////////////////////////////////////////////////////////
// Purpose: Codec interface interrupt service routine
//
// Input: None
//
// Returns: Nothing
//
// Calls: CheckForOverrun, ReadCodecData, WriteCodecData
//
// Notes: None
///////////////////////////////////////////////////////////////////////
{
/* add any local variables here */

if(CheckForOverrun()) // overrun error occurred (i.e. halted DSP)
return; // so serial port is reset to recover

mybuff = McASPRxBufRead(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_RX);

CodecDataIn.UINT = ReadCodecData(); // get input data samples

/* add your code starting here */

// I added my code here
temp = CodecDataIn.Channel[RIGHT]; // R to temp
CodecDataOut.Channel[RIGHT] = CodecDataIn.Channel[LEFT]; // L to R
CodecDataOut.Channel[LEFT] = temp; // temp to L
// end of my code

/* end your code here */

WriteCodecData(CodecDataOut.UINT); // send output data to port
}