McASP Frame Sync

Hi,

Thanks for your post.

Please ensure "csl6713.lib" library search paths below are included in project properties->C6000Linker->FileSearchPath since all CSL API's are included in the CSL libraries:

"~\ti\CSL_C6713\lib_3x\csl6713.lib"

"~\ti\CSL_C6713\lib_2x\csl6713.lib"

For example, "MCASP_enableFsync" is a CSL API which enables internal framesync of the frame sync master. If you put a breakpoint @MCASP_enableFsync and debug, it will let you into the source code of CSL API and you could validate the McASP framesync. Likewise, if you keep breakpoint @InitMcasp(port) and debug, and you could validate the values of  AHCLKR, ACLKR through MCASP_ConfigGbl device configuration structure in which, you can check the values of MCASP_PFUNC_AFSX_MCASP, MCASP_PFUNC_AFSR_MCASP and validate the same what it takes. By this, you could narrow down the issue why there is no framesync signals on pins AFSR0 and AFSX0.

May be, you could check the source of CSL API "MCASP_enableFsync" by presuming the CSL_C6713 is installed and you could check the source of CSL from the below paths:

~\ti\CSL_C6713\lib_2x\csl6000.src

~\ti\CSL_C6713\lib_3x\csl6000.src

/*----------------------------------------------------------------------------*/

void MCASP_enableFsync(MCASP_Handle hMcasp, Uint32 direction)

{

Uint32 rfsync = 0;

Uint32 xfsync = 0;

if (direction & MCASP_RCV)

{

rfsync = (MCASP_FMKS(GBLCTL,RFRST,ACTIVE));

}

if (direction & MCASP_XMT)

{

xfsync = (MCASP_FMKS(GBLCTL,XFRST,ACTIVE));

}

if (direction)

 MCASP_RSETH(hMcasp,GBLCTL,(MCASP_RGETH(hMcasp,GBLCTL)|rfsync|xfsync));

}

Alternatively, you could also try downloading BSL code examples (dsk6713revc_files.zip) and try McASP example from the below DSK6713 support page:

http://c6000.spectrumdigital.com/dsk6713/revc/

Thanks & regards,

Sivaraj K.

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Thank you for your quick reply.

I have the following result:
1) library search paths are included in project properties
2) In debug mode i validate the values of registers :
GBLCTL - 00000000000000000001111100001111
AHCLKRCTL - 00000000000000001100000000010100
ACLKRCTL - 00000000000000000000000000100000
PFUNC0 - 00000000000000000000000000000000
3) void MCASP_enableFsync(MCASP_Handle hMcasp, Uint32 direction) - normal
4) dsk6713revc_files.zip consist only McBSP example

McASP1 program example, in console write - TEST PASSED, but no framesync signals on pins AFSR0 and AFSX0.

1)DSK6713 support home page do not have McASP example code ( BSL contains McBSP example code only)!
2)AFSR and AFSX is updating from CSL API call "MCASP_enableFsync".

Thanks.