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OMAP-L137 EVM Matlab 2013a Simulink and CCSv3.3

Other Parts Discussed in Thread: TMS320C6747, OMAP-L137

Hi,

My partner and I are using the OMAP-L137/TMS320C6747 EVM board. Currently, we are trying to setup a simple ADC to DAC application in Simulink as a test project with the board. However, after we build the project in the Simulink window, we receive an error output in CCS of:

"c6747evm_aic31.c", line 138: error: identifier "Mcasp_BufferFormat_1SER_1SLOT" is undefined


Could someone clarify the source of this error and any possible solution?

Regards,

CSUB DSP

The line in question is highlighted below.

A copy/paste of the c6747evm_aic31.c file is as follows:

/*
 *  $Revision: 1.1.6.5 $
 *  $Date: 2010/06/10 19:36:40 $
 *  Copyright 2009-2010 The MathWorks, Inc.
 */

#include <std.h>
#include <mem.h>
#include <assert.h>
#include <gio.h>
#include <stdio.h>
#include "soc_C6747.h"
#include "cslr.h"
#include "cslr_syscfg_C6747.h"
#include "ti/pspiom/psc/Psc.h"
#include "ti/pspiom/mcasp/Mcasp.h"
#include "ti/pspiom/platforms/codec/Aic31.h"
#include "ti/pspiom/platforms/evm6747/audio/Audio.h"
#include "ti/sdo/edma3/drv/edma3_drv.h"
#include "c6747evm_aic31.h"
#include "MW_c6xxx_csl.h"

// Imported data
extern Int edma3init(void);
extern EDMA3_DRV_Handle hEdma;
extern int32_T SDRAM;

#define NUM_CHANNELS        (2u)
#define NUM_AUDIO_BUFFERS   (3u)
#define MW_BUFFALIGN        (128u)
#define KICK0_UNLOCK_CODE   (0x83E70B13u)
#define KICK1_UNLOCK_CODE   (0x95A4F1E0u)
#define PSC_MCASP1_LPSC     (8)
#if (NUM_AUDIO_BUFFERS != 3)
    #error "Number of audio buffers must be 3."
#endif


enum{
    AIC31_8KHZ = 0,
    AIC31_11KHz,
    AIC31_16KHZ,
    AIC31_22KHZ,
    AIC31_24KHZ,
    AIC31_32KHZ,
    AIC31_44KHZ,
    AIC31_48KHZ,
    AIC31_96KHZ,
    AIC31_NUM_FREQ
} AIC31_FREQ;

static Uint32 freq[AIC31_NUM_FREQ] = {
    8000,
    11025,
    16000,
    22050,
    24000,
    32000,
    44100,
    48000,
    96000
};

// AIC31 configuration structures
// Note that the name of the configuration
// structure must match TCI file entry.
Mcasp_HwSetupData mcaspRcvSetup = {
        /* .rmask    = */ 0xFFFFFFFF, /* All the data bits are to be used     */
        /* .rfmt     = */ 0x000080F0, /*
                                       * 0 bit delay from frame sync
                                       * MSB first
                                       * No extra bit padding
                                       * Padding bit (ignore)
                                       * slot Size is 32
                                       * Reads from DMA port
                                       * NO rotation
                                       */
        /* .afsrctl  = */ 0x00000000, /* burst mode,
                                       * Frame sync is one bit
                                       * Rising edge is start of frame
                                       * externally generated frame sync
                                       */
        /* .rtdm     = */ 0x00000001, /* slot 1 is active (DSP)               */
        /* .rintctl  = */ 0x00000003, /* sync error and overrun error         */
        /* .rstat    = */ 0x000001FF, /* reset any existing status bits       */
        /* .revtctl  = */ 0x00000000, /* DMA request is enabled or disabled   */
        {
             /* .aclkrctl  = */ 0x00000000,
             /* .ahclkrctl = */ 0x00000000,
             /* .rclkchk   = */ 0x00000000
        }
};

Mcasp_HwSetupData mcaspXmtSetup = {
        /* .xmask    = */ 0xFFFFFFFF, /* All the data bits are to be used     */
        /* .xfmt     = */ 0x000080F0, /*
                                       * 0 bit delay from framsync
                                       * MSB first
                                       * No extra bit padding
                                       * Padding bit (ignore)
                                       * slot Size is 32
                                       * Reads from DMA port
                                       * NO rotation
                                       */
        /* .afsxctl  = */ 0x00000000, /* burst mode,
                                       * Frame sync is one bit
                                       * Rising edge is start of frame
                                       * externally generated frame sync
                                       */
        /* .xtdm     = */ 0x00000001, /* slot 1 is active (DSP)               */
        /* .xintctl  = */ 0x00000007, /* sync error,overrun error,clK error   */
        /* .xstat    = */ 0x000001FF, /* reset any existing status bits       */
        /* .xevtctl  = */ 0x00000000, /* DMA request is enabled or disabled   */
        {
             /* .aclkxctl  = */ 0x00000000,
             /* .ahclkxctl = */ 0x00000000,
             /* .xclkchk   = */ 0x00000000
        },

};


// McASP channel parameters                                 
Mcasp_ChanParams  mcasp_chanparam[Audio_NUM_CHANS]=
{
    {
        0x0001,                  
        {Mcasp_SerializerNum_0, },     
        &mcaspRcvSetup,
        TRUE,
        Mcasp_OpMode_TDM,          
        Mcasp_WordLength_32,
        NULL,
        0,
        NULL,
        NULL,
        1,
        Mcasp_BufferFormat_1SER_1SLOT,
        TRUE,
        TRUE
    },
    {
        0x0001,                     
        {Mcasp_SerializerNum_5,},
        &mcaspXmtSetup,             
        TRUE,                   
        Mcasp_OpMode_TDM,         
        Mcasp_WordLength_32,
        NULL,
        0,
        NULL,
        NULL,
        1,
        Mcasp_BufferFormat_1SER_1SLOT,
        TRUE,
        TRUE
    }
};

Audio_ChannelConfig audioChanParamsIN =
{                                    
    (Ptr)&mcasp_chanparam[0],      
    {                                           
        {
            44100,  
            0,     
            0x00,
            0x00
        }
    }
};

Audio_ChannelConfig audioChanParamsOUT =
{        
    (Ptr)&mcasp_chanparam[1],     
    {
        {
            44100,  
            70,
            0x00,
            0x00
        }
    }
};

Mcasp_Params audioMcaspParams;
Aic31_Params audioAic31Params;
Audio_Params audioParams;

static SEM_Obj semRx, semTx;  
static GIO_Handle inChan, outChan;
static GIO_AppCallback appReadCb, appWriteCb;
static volatile Ptr rxBuff[NUM_AUDIO_BUFFERS];
static volatile Ptr txBuff[NUM_AUDIO_BUFFERS];
static volatile int32_T postRxReq = 0;
static volatile int32_T postTxReq = 0;


// callback for buffer capture completion
static Void rxCallback(Ptr arg, Int status, Ptr bufp, Uns size)
{
    static int32_T rxIndx = 0;

    if (postRxReq)
    {
        Ptr tmp;

        postRxReq = 0;
        tmp = rxBuff[rxIndx];
        rxBuff[rxIndx] = rxBuff[NUM_AUDIO_BUFFERS-1];
        rxBuff[NUM_AUDIO_BUFFERS-1] = tmp;
        SEM_post(&semRx);
    }
    GIO_submit(inChan, IOM_READ, rxBuff[rxIndx], &size, &appReadCb);
    rxIndx ^= 1;
}


// Callback for buffer transfer completion
static Void txCallback(Ptr arg, Int status, Ptr bufp, Uns size)
{
    static int32_T txIndx = 0;

    if (postTxReq)
    {
        Ptr tmp;

        postTxReq = 0;
        tmp = txBuff[txIndx];
        txBuff[txIndx] = txBuff[NUM_AUDIO_BUFFERS-1];
        txBuff[NUM_AUDIO_BUFFERS-1] = tmp;
        SEM_post(&semTx);
    }
    GIO_submit(outChan, IOM_WRITE, txBuff[txIndx], &size, &appWriteCb);
    txIndx ^= 1;
}
 

// AIC31 initialization function
void MW_aic31Init(void)
{
    Aic31_init();
    audioAic31Params = Aic31_PARAMS;
    audioAic31Params.acCtrlBusName = "/i2c0";
}


// Mcasp init function called when creating the driver.
void MW_mcAspInit()
{
    CSL_SyscfgRegsOvly sysCfgRegs = (CSL_SyscfgRegsOvly) CSL_SYSCFG_0_REGS;
   
    // Unlock SYSCFG module
    sysCfgRegs->KICK0R = KICK0_UNLOCK_CODE;
    sysCfgRegs->KICK1R = KICK1_UNLOCK_CODE;
    
    // Enable McASP1
    CSL_FINST(sysCfgRegs->PINMUX8,  SYSCFG_PINMUX8_PINMUX8_27_24,   AXR1_11);
    CSL_FINST(sysCfgRegs->PINMUX8,  SYSCFG_PINMUX8_PINMUX8_23_20,   AXR1_10);
    CSL_FINST(sysCfgRegs->PINMUX11, SYSCFG_PINMUX11_PINMUX11_31_28, AFSX1);
    CSL_FINST(sysCfgRegs->PINMUX11, SYSCFG_PINMUX11_PINMUX11_27_24, ACLKX1);
    CSL_FINST(sysCfgRegs->PINMUX11, SYSCFG_PINMUX11_PINMUX11_23_20, AHCLKX1);
    CSL_FINST(sysCfgRegs->PINMUX12, SYSCFG_PINMUX12_PINMUX12_31_28, AXR1_3);
    CSL_FINST(sysCfgRegs->PINMUX12, SYSCFG_PINMUX12_PINMUX12_27_24, AXR1_2);
    CSL_FINST(sysCfgRegs->PINMUX12, SYSCFG_PINMUX12_PINMUX12_23_20, AXR1_1);
    CSL_FINST(sysCfgRegs->PINMUX12, SYSCFG_PINMUX12_PINMUX12_19_16, AXR1_0);
    CSL_FINST(sysCfgRegs->PINMUX12, SYSCFG_PINMUX12_PINMUX12_15_12, AMUTE1);
    CSL_FINST(sysCfgRegs->PINMUX12, SYSCFG_PINMUX12_PINMUX12_11_8,  AFSR1);
    CSL_FINST(sysCfgRegs->PINMUX12, SYSCFG_PINMUX12_PINMUX12_7_4,   ACLKR1);
    CSL_FINST(sysCfgRegs->PINMUX12, SYSCFG_PINMUX12_PINMUX12_3_0,   AHCLKR1);
    CSL_FINST(sysCfgRegs->PINMUX13, SYSCFG_PINMUX13_PINMUX13_23_20, AXR1_9);
    CSL_FINST(sysCfgRegs->PINMUX13, SYSCFG_PINMUX13_PINMUX13_19_16, AXR1_8);
    CSL_FINST(sysCfgRegs->PINMUX13, SYSCFG_PINMUX13_PINMUX13_15_12, AXR1_7);
    CSL_FINST(sysCfgRegs->PINMUX13, SYSCFG_PINMUX13_PINMUX13_11_8,  AXR1_6);
    CSL_FINST(sysCfgRegs->PINMUX13, SYSCFG_PINMUX13_PINMUX13_7_4,   AXR1_5);
    CSL_FINST(sysCfgRegs->PINMUX13, SYSCFG_PINMUX13_PINMUX13_3_0,   AXR1_4);
   
    // Lock SYSCFG module
    sysCfgRegs->KICK0R = 0x0;
   
    // Power on McASP  
    Psc_ModuleClkCtrl(Psc_DevId_1, PSC_MCASP1_LPSC, TRUE);

    // Init McASP driver
    Mcasp_init();
    audioMcaspParams           = Mcasp_PARAMS;
    audioMcaspParams.hwiNumber = 8;
}


// Audio init function called when creating the driver.
void MW_audioInit(void)
{
    Audio_init();
    audioParams              = Audio_PARAMS;
    audioParams.adDevType    = Audio_DeviceType_McASP;
    audioParams.adDevName    = "/mcasp1";
    audioParams.acNumCodecs  = 1;
    audioParams.acDevName[0] = "/aic310";
}


// Common initialization function for ADC and DAC modules
static void adcDacCommonInit(Uint32 samplingRate)
{
    static boolean_T firstTime = true;
    
    if (firstTime) {
        if (hEdma == NULL) {
            // Init EDMA engine
            edma3init();
            mcasp_chanparam[0].edmaHandle = hEdma;
            mcasp_chanparam[1].edmaHandle = hEdma;

            // Set sampling rate
            assert((samplingRate > 0) && (samplingRate <= AIC31_NUM_FREQ));
            audioChanParamsIN.acChannelConfig[0].samplingRate  = freq[samplingRate-1];
            audioChanParamsOUT.acChannelConfig[0].samplingRate = freq[samplingRate-1];
        }

        // Create channel handles
        inChan  = GIO_create("/audio0", IOM_INPUT,  NULL, (Ptr)(&audioChanParamsIN), NULL);
        outChan = GIO_create("/audio0", IOM_OUTPUT, NULL, (Ptr)(&audioChanParamsOUT), NULL);
        if ((inChan == NULL) || (outChan == NULL)) {
            fprintf(stderr, "Channel creation FAILED.");
            SYS_exit(-1);
        }
        firstTime = false;
    }
}

// Allocate ADC/DAC buffers for GIO exchanges
static void allocBuffers
(
    GIO_Handle *hChannel,
    Int cmd,
    Uns numSamples,
    volatile Ptr *buffArray,
    GIO_AppCallback *appCb
)
{
    int i;
    Uns buffSize = NUM_CHANNELS * numSamples * sizeof(Int16);

    // Allocate buffers for the GIO buffer exchanges
    for(i = 0; i < NUM_AUDIO_BUFFERS; i++)
    {
        buffArray[i] = (Ptr) MEM_calloc(SDRAM,
            (buffSize + MW_BUFFALIGN - 1) & ~(MW_BUFFALIGN - 1),
            MW_BUFFALIGN);
        if(buffArray[i] == NULL) {
            fprintf(stderr, "Memory allocation for audio ADC/DAC failed.");
            SYS_exit(-1);
        }

        // Pass allocated buffer to GIO manager
        if (i != (NUM_AUDIO_BUFFERS-1))    {
            if (GIO_submit(*hChannel, cmd, buffArray[i], &buffSize, appCb) < 0) {
                fprintf(stderr, "Error issuing buffer to the audio stream.");
                SYS_exit(-1);
            }
        }
    }
}


// ADC initialization
void c6747evmAic31AdcInit(Uint32 samplingRate, Uint32 numSamples)
{
    // Initialize ADC related parameters
    appReadCb.fxn = rxCallback;
    SEM_new(&semRx, 0);

    // Call common initialization function
    adcDacCommonInit(samplingRate);
    allocBuffers(&inChan, IOM_READ, numSamples, rxBuff, &appReadCb);
}


// DAC initialization
void c6747evmAic31DacInit(Uint32 samplingRate, Int32 numSamples)
{  
    // Initialize DAC related parameters
    appWriteCb.fxn = txCallback;    
    SEM_new(&semTx, 1);

    // Call common initialization function
    adcDacCommonInit(samplingRate);
    allocBuffers(&outChan, IOM_WRITE, numSamples, txBuff, &appWriteCb);
}

//
// Receive audio samples from capture buffer and pass them
// to application. Split interleaved audio samples to left & right
// samples.
//
void c6747evmAic31AdcRecv(Int16 *y1, Int32 numSamples)
{
    int i;
    Int16 *p;

    // Wait for buffer completion event from McASP driver
    postRxReq = 1;
    SEM_pend(&semRx, SYS_FOREVER);

    // De-interleave audio samples
    p = (Int16 *) rxBuff[NUM_AUDIO_BUFFERS-1];
    for (i = 0; i < numSamples; i++) {
        *y1                = *p++;
        *(y1 + numSamples) = *p++;
        y1++;
    }
}

//
// Receive audio samples from application and pass them
// to the audio transmit buffer. Interleave audio samples
// in the process.
//
void c6747evmAic31DacXmt(Int16 *u1, Int32 numSamples)
{
    int i;
    Int16 *p;

    // Wait for buffer completion event from McASP driver
    SEM_pend(&semTx, SYS_FOREVER);

    // Interleave audio samples
    p = (Int16 *) txBuff[NUM_AUDIO_BUFFERS-1];;
    for (i = 0; i < numSamples; i++) {
        *p++ = *u1;
        *p++ = *(u1 + numSamples);
        u1++;
    }
    postTxReq = 1;
}