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C6747 EMIF A and GPIO pin muxing

Other Parts Discussed in Thread: OMAP-L137

Hi everyone,

I'm currently designing a board with a C6747 DSP and an FPGA. The idea is to stream data between them using EMIF A in synchronous mode (the FPGA will mimic a SDRAM-like interface). The address lines won't be needed in the application, as the FPGA will be acting as a FIFO, outputting/receiving a sequential stream regardless of the requested address.

However, I do need some lines to allow the FPGA to interrupt the DSP. It would be convenient to reuse the EMIF A address lines for this purpose, as they also are GPIOs.

So, my question is: can I enable the EMIF A peripheral while at the same time setting up the PINMUX registers so that some address lines are selected as GPIOs?

Thanks,

- Dave

  • Hi Dave,
    We won't recommend customers to modify the PINMUX registers for reuse to different peripheral while run time.
    Need to ensure there are proper direction buffers incase there is some switching from input to output.
    Please refer to the following TI E2E post.
    e2e.ti.com/.../1479893

  • Hi Titus,

    Thanks for the quick reply. I have checked the discussion you linked (and the link in that discussion).

    The issues that were pointed out in those posts were related to on-the-fly changes of PINMUX, and to inputs being driven to intermediate voltages which are not valid logic levels. You also pointed out that there might be issues when switching buffer direction.

    However, in my case, there will be no run-time changes to the PINMUX, no inputs left floating / driven to invalid levels, nor changes in buffer direction. Simply, what I was thinking to do is use the PINMUX to assign the EMIF data pins to the EMIF peripheral, and assign (part of) the address pins to the GPIO peripheral. No function or direction changes while running.

    Would that be possible?

    Thanks,
    - Dave
  • My experience is on the OMAP-L137 which is essentially a C6747 with a ARM. I have pinmuxed a portion of the pins to EMIF and a portion to SD Card. The SD Card took the lower 4 Data and lower 2 Address lines away from EMIFA. I had a CPLD attached to EMIFA that was programmed to ignore those lost Data and Address lines. I had no apparent problems but I did no look into it that deeply.
  • Hi Dave,
    Ohh. Then I hope you won't face any issues if we used some part of EMIFA address lines for GPIO when we operated with less address lines.
  • Norman, Titus,

    Thanks for the responses. I will try to use the address lines as GPIOs, as it sounds doable as per Norman's answer, and see if I have a couple spares to route as "backup" in case it doesn't work.

    - Dave