Hello.
I have C6745 DSK and cslr library.
My GPIO example working only when:
/** @brief Base address of GPIO memory mapped registers */
#define CSL_GPIO_0_REGS (0x01E26000u)
but in [SPRS377F – SEPTEMBER 2008–REVISED JUNE 2014] document we have the next:
Where is a mistake?
2) I am using Bank_1 -> Pin_5
When i write:
/* Configure GPIO1_5 (GPIO1_5_PIN) as an output */
gpioRegs->BANK[1].DIR &= ~(CSL_GPIO_DIR_DIR_IN << CSL_GPIO_DIR_DIR5_SHIFT); - it is not work
but when i write the next:
/* Configure GPIO1_5 (GPIO1_5_PIN) as an output */
gpioRegs->BANK[0].DIR &= ~(CSL_GPIO_DIR_DIR_IN << CSL_GPIO_DIR_DIR21_SHIFT); - it is work fine
Is it correct ?
What values takes X in BANK[X].DIR ?
Where it can be read ?