Hello,
We are working with target hardware that uses a TMS320C6746, mated with SDRAM. The SDRAM memory architecture is essentially the same as that used with the OMAP-L138, with the MT46H32M16LF part. In the process of debugging this memory design, we’ve come across the need to monitor the DDR lines connected to the SDRAM part, for both data and addressing. However, because of the BGA and board layering, there is no way to connect debug wires to those pins, for monitoring. Are there any alternative methods for debugging such a memory interface, and looking at those lines? Ideally, I’d be able to control the DDR pins via Code Composer Studio, as IO or simple reads and writes, and watch their state on an oscilloscope.
Regards,
Robert