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C6748 EMIF - using EMA_B[0] as the highest address line

Other Parts Discussed in Thread: TMS320C6748

Hello TI,

On the TMS320C6748 EMIF bus it is possible to natively address a 16-bit device up to 32MB by connecting A[22:0]+BA[1] to the 16-bit device's A[23:0], as indicated in most TI examples.

However, spruh79a states on page 776: Additionally, when the EMIFA interfaces to a 16-bit asynchronous device, the EMA_BA[0] pin can serve as the upper address line.

This seems to indicate that connecting BA[0]+A[22:0]+BA[1] to a 16-bit device's A[24:0] is plausible, thereby natively addressing up to 64MB (ie. without additional GPIOs for the MSBs, Bank selects or additional logic or BA[0] being used as GPIO).

Is this true, or what does the sentence otherwise refer to, spruh79a specifically being the Technical Reference Manual for the TMS320C6748 DSP after all?

  • Hello Bernhard,

    You interpretation on the statement "Additionally, when the EMIFA interfaces to a 16-bit asynchronous device, the EMA_BA[0] pin can serve as the upper address line" is not correct. Please note the upper address line is mentioned as EMA_A[22] and the next statement in the TRM is "Note that the width of the address bus varies with devices; therefore, see your device-specific data manual for the EMA_A bus width supported."

    Some of the device in C674x family does not have EMA_A[22] line; in that case EMA_BA[0] line can be used as upper address line to access the full 32MB in 16-bit memory device.

    Hope it clarifies.

    Regards,
    Senthil