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[OMAP-L138, DEEPSLEEP] Minimum time requirement to release DEEPSLEEP pin and desired value for SLEEPCOUNT ?

Naoki Kawada
Guru 19890 points
Other Parts Discussed in Thread: OMAP-L138

Hi,

My customer has some questions about DEEPSLEEP mode. They want to confirm :

1. Minimum (or reasonable) time requirement to release DEEPSLEEP pin (Low to High). We are asking this because.... When asserting DEEPSLEEP pin to 'Low', some shutdown sequences start for gating internal clock internally. Please take a look at Figure 10-1. Deep Sleep Mode Sequence in TRM. If DEEPSLEEP time frame is too small, we may be able to de-assert DEEPSLEEP pin to 'High' during this shutdown sequence and we are wondering if this can be allowed or not.

2. Desired value for SLEEPCOUNT. Please note they are using external clock generator for OMAP-L138 and the clocks should be stable during DEEPSLEEP mode. So we are wondering what value should be in SLEEPCOUNT.

Best Regards,
Naoki Kawada

  • 0
    TI__Guru** 116100 points
    Hi Naoki ,

    1. Minimum (or reasonable) time requirement to release DEEPSLEEP pin (Low to High). We are asking this because.... When asserting DEEPSLEEP pin to 'Low', some shutdown sequences start for gating internal clock internally. Please take a look at Figure 10-1. Deep Sleep Mode Sequence in TRM. If DEEPSLEEP time frame is too small, we may be able to de-assert DEEPSLEEP pin to 'High' during this shutdown sequence and we are wondering if this can be allowed or not.

    I hope it won't happen since you can come out of the deep sleep only if SLEEPCOMPLETE bit is set.


    2. Desired value for SLEEPCOUNT. Please note they are using external clock generator for OMAP-L138 and the clocks should be stable during DEEPSLEEP mode. So we are wondering what value should be in SLEEPCOUNT.

    When exiting the deepsleep mode, you have to hold the DEEPSLEEP pin high until SLEEPCOMPLETE is set *and* you disable SLEEPENABLE mode (step 2 and 3 in the system guide). If you drop DEEPSLEEP pin after pulsig high, before this is does, you could possibly go back in deep sleep mode.
  • 0 in reply to Titusrathinaraj Stalin
    Guru 19890 points

    Hi,

    Thanks for your reply. Maybe, you didn't understand my questions correctly.
    I tried summarizing my questions as below. Can you confirm again ?

  • 0 in reply to Naoki Kawada
    Guru 19890 points
    Hello,

    Is nobody here ? I'm waiting for your response.

    Best Regards,
    Naoki
  • 0 in reply to Naoki Kawada
    TI__Mastermind 43660 points
    Hello Naoki,

    1. It is not advisable to de-assert DEEPSLEEP pin during internal shutdown sequence. You must adhere to the DEEPSLEEP sequence given in the TRM.

    2. I am sure about the adverse effect of making the SLEEPCOUNT to 0 when you are using external oscillaor. However i would suggest you to use minimal delay in SLEEPCOUNT for proper wakeup.

    Regards,
    Senthil
  • 0 in reply to Mukul Bhatnagar
    TI__Guru** 116100 points

    You may get access denied for one of the post which Mukul has given, here is that information.

    The deep sleep logic has a counter which increments with every clock pulse on the OSCIN pin. When the counter reaches the number specified in SLEEPCOUNT, the deep sleep logic allows the clock on OSCIN to propagate to other parts of the system.

    The SLEEPCOUNT feature is intended for cases in which the internal oscillator is used. The internal oscillator is fully disabled in deep sleep mode. When you exist deep sleep mode, the oscillator will be turned on and will generate very small oscillations which will not be detected by the deep sleep counter. Eventually those oscillations will grow to an amplitude large enough to start incrementing the deep sleep counter. In this case I would recommend that the SLEEPCOUNT be set to 4096. This means that 4096 valid clock cycles must be detected before the clock is passed to the rest of the system.

    In the case that the internal oscillator is not used and the clock is generated externally, the SLEEPCOUNT value can be very small since the clock input is assumed to be stable before Freon is taken out of deep sleep mode. A value of 128 would be more than adequate.

  • 0 in reply to Mukul Bhatnagar
    Guru 19890 points
    Hi Senthil and Mukul,

    Thanks for your reply. I understood. I'll suggest the customer to use minimal delay count in SLEEPCOUNT. As for de-asserting DEEPSLEEP pin during 'internal shutdown sequence', the above picture shows it will take 3 PLL reference clocks to complete it. Maybe, it would be min time requirement for de-asserting DEEPSLEEP, but I'll ask them to have enough margin for safe.

    Thanks.
    Naoki Kawada
  • 0 in reply to Naoki Kawada
    Guru 19890 points
    Titus S. ,

    Yes, in fact, I could not access the URL. Now I completely understood.

    Thanks
    Naoki
  • 0 in reply to Naoki Kawada
    TI__Guru** 116100 points
    Naoki,
    Thanks for your update.
  • 0 in reply to Titusrathinaraj Stalin
    Prodigy 10 points

    Hi Titus,

    Following the deep sleep question,

    We had encounter the problem when device wake up.

    Although the sleep count had set as maximum value 0xFFFF,

    the deep sleep logic released clock to system even the oscillator was not stable.

    Questions,

    1. how could sleep logic counter start before oscillator start.

    2. what the maximum time for oscillator start up.

    Best regards,

    Ray