VPIF Address Registers Question

Jerome Lieow

Other Parts Discussed in Thread: OMAPL138

Hi,

I am trying to initialize the VPIF for 10bit raw capture mode using the instructions in the tech ref and I have a few questions regarding some of the registers I have to configure. On page 1715 of the tech ref it says that I would need to configure the storage memory address control related registers.

Does "storage memory address registers" refer to these top and bottom field registers as shown in the figure below?

If yes, then is there any where that provides information of what these address registers are and what do they refer to? While the tech ref does provide examples for these address registers , seems to be a summary for experience individuals.

I am pretty new to interfacing image sensors and in my limited understanding for 8bit raw data, I have to program only the C0LUMA register but for 10bit raw data I have to program both the C0TLUMA and C0BLUMA registers. Can I just point both to the same address starting point or do I have to point them both to different starting address locations?

Regards,
Jerome Lieow

over 7 years ago

0 RandyP over 7 years ago

TI__Guru* 84110 points

Jerome,

Which TI device are you using?

If you are not using a TI-supplied Software Development Kit, please do so. Support for many of the details in our processors are handled in the software libraries we provide.

If you are using a TI SDK, which one and which version?

Regards,
RandyP

0 Shankari G over 7 years ago

TI__Mastermind 43955 points

Hi Jerome,

In addition to Randy's suggestion, for C674x and OMAPL138 devices, there exists a VPIF loop back examples in the starterware packages. ( OMAPL138 starterware ) Please check out the configurations used in the examples. It might be helpful.

Extract from the vpif.c ( starterware)

/*******************************************************************

** Values that represent width of the raw data input
** Used in the VPIFCaptureRawDatawidthConfig API
*/
#define VPIF_RAW_EIGHT_BPS                      (VPIF_C0CTRL_DATAWIDTH_EIGHT_BPS << VPIF_C0CTRL_DATAWIDTH_SHIFT)
#define VPIF_RAW_TEN_BPS                        (VPIF_C0CTRL_DATAWIDTH_TEN_BPS << VPIF_C0CTRL_DATAWIDTH_SHIFT)
#define VPIF_RAW_TWELVE_BPS                     (VPIF_C0CTRL_DATAWIDTH_TWELVE_BPS << VPIF_C0CTRL_DATAWIDTH_SHIFT)

void VPIFCaptureRawDatawidthConfig(unsigned int baseAddr, unsigned int width)
{
    unsigned int temp;
    temp = HWREG(baseAddr + C0CTRL) & ~VPIF_C0CTRL_DATAWIDTH;
    HWREG(baseAddr + C0CTRL) = temp | width;
}

------------------------------------------------------------------------------------------------------

0 Sivaraj Kuppuraj over 7 years ago

TI__Mastermind 35645 points

Hi,

Please refer the below e2e post to capture raw data in DSP thru. VPIF:

e2e.ti.com/.../1182864
e2e.ti.com/.../1407227
e2e.ti.com/.../1163656

Thanks & regards,
Sivaraj K

0 Jerome Lieow over 7 years ago in reply to RandyP

Intellectual 270 points

Hi Randy,

I am using the C6748, sorry I forgot to include that.

Regards,
Jerome Lieow

0 Jerome Lieow over 7 years ago in reply to Shankari G

Intellectual 270 points

Hi Shankari,

Thank you, I did skim through the examples but did not manage to see those definitions. I will look through them again to understand it properly this time.

Regards,
Jerome LIeow

0 Jerome Lieow over 7 years ago in reply to Sivaraj Kuppuraj

Intellectual 270 points

Hi Sivaraj,

Thank you for your links, I will go through them.

Regards,
Jerome Lieow

0 Jerome Lieow over 7 years ago in reply to Sivaraj Kuppuraj

Intellectual 270 points

Hi guys,

I am a little confused with one particular part of the VPIF interrupt generation. In the tech ref, for frame0 interrupts for progressive mode can only occur for the Top field. Is there anyway to generate interrupts for the Bottom field using progressive mode or do I have no choice but to use interlaced mode? Thank you.

Regards,
Jerome Lieow

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VPIF Address Registers Question