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Floating point arithmetic operation of C6746

Soon Lim47
Prodigy 20 points
Other Parts Discussed in Thread: MATHLIB

Hi, I have questions about C6746. From TI homepage, the capability of C6746's Floating point arithmetic operation is expressed as "2.7 GFLOPS".

I wonder how the "2.7 GFLOPS" is calculated. Also wonder that TI guarantee that performance commonly.

And I found that C6746 has a FPU with six ALU functional units supporting SP and DP. How can i understand the processing time of DP  and SP floating point operation? Just double cycle on DP than SP floating point arithmetic operation?

Thank you for your attention!

  • 0
    TI__Mastermind 43955 points

    Hi Soon Lim47,

    May be you can run through the examples given in the mathlib_c674x_3_1_1_0.

    Those examples will demonstrate how the cycles are calculated for SP and DP.

    As well as, have a look at the test report, "..ti\mathlib_c674x_3_1_1_0\docs\MATHLIB_c674x_TestReport.html" once you install the above said package.

  • 0 in reply to Shankari G
    TI__Genius 12805 points

    Hi Soon Lim47

    The best place to understand how long each instruction takes is to read the instruction description in sprufe8b 

    To understand the delay and the latency look at chapter 3.4 of the document.  For most of the instructions (except table 3.8 instructions) the functional unit can start a new operation every clock, even though it can take more than one cycle to complete instruction (this is the difference between delay and latency).  This is due to the pipeline architecture of the functional units.

    The GFLOPS depends on your clock, but they are 2 M units that do floating point multiplications every cycle, 2 L functional units and 2 S functional units each does floating point additions (all single precision) every cycle.

    Ran