Hai,
I am using TMS320C6748zwt processor and In I2C side through oscilloscope manually checked SDA and SCL working. But below code i am using not going to stop interrupt only ARDY interrupts occuring.
I am doing below procedure:-
i2c_init()
{
I2caRegs.ICMDR.all = 0x0000;
I2caRegs.ICPSC.all = 0X02; // Prescaler - need 8MHz
I2caRegs.ICCLKL = 0x0B; // NOTE: must be non zero
I2caRegs.ICCLKH = 0x0B; // NOTE: must be non zero(250KHz)
I2caRegs.ICIMR.all = 0x24; // Enable SCD & ARDY interrupts
I2caRegs.ICMDR.all = 0x0020; // Take I2C out of reset
}
i2c_setup()
{
I2cMsgOut1.MsgStatus = I2C_MSGSTAT_INACTIVE;
}
Decoder_init()
{
i2c_DataOUT[0] = 0x81; // data
WriteData_To_I2C(0x42,0x00,1);
i2c_DataOUT[0] = 0x88; // data
WriteData_To_I2C(0x42,0x01,1);
i2c_DataOUT[0] = 0x08; // data
WriteData_To_I2C(0x42,0x35,1);
i2c_DataOUT[0] = 0x00; // data
WriteData_To_I2C(0x42,0x34,1);
}
void WriteData_To_I2C(uint32_t SlaveAddress,uint32_t RegAddress,uint32_t NumOfBytes)
{
CurrentMsgPtr = &I2cMsgOut1;
while(I2cMsgOut1.MsgStatus != I2C_MSGSTAT_INACTIVE);
I2cMsgOut1.MsgStatus = I2C_MSGSTAT_SEND_WITHSTOP;
I2cMsgOut1.SlaveAddress = SlaveAddress >> 1;
I2cMsgOut1.NumOfBytes = NumOfBytes;
I2cMsgOut1.MemoryLowAddr = RegAddress;
Write_To_I2C(&I2cMsgOut1);
I2cMsgOut1.MsgStatus = I2C_MSGSTAT_INACTIVE;
}
void Write_To_I2C(struct I2CMSG *msg)
{
if(I2cMsgOut1.MsgStatus == I2C_MSGSTAT_SEND_WITHSTOP )
{
Error = I2CA_WriteData(&I2cMsgOut1);
if (Error == I2C_SUCCESS)
{
CurrentMsgPtr = &I2cMsgOut1;
I2cMsgOut1.MsgStatus = I2C_MSGSTAT_WRITE_BUSY;
}
} // end of write section
}
uint32_t I2CA_WriteData(struct I2CMSG *msg)
{
uint32_t i;
if (I2caRegs.ICMDR.bit.STP == 1)
{
return I2C_STP_NOT_READY_ERROR;
}
I2caRegs.ICSAR = msg-> SlaveAddress;
// Check if bus busy
if (I2caRegs.ICSTR.bit.BB == 1)
{
return I2C_BUS_BUSY_ERROR;
}
// Setup number of bytes to send
// MsgBuffer + Address
I2caRegs.ICCNT = msg->NumOfBytes+1;
I2caRegs.ICDXR = msg->MemoryLowAddr;
for (i=0; i<msg->NumOfBytes; i++)
{
I2caRegs.ICDXR = i2c_DataOUT[i];
}
I2caRegs.ICMDR.all = 0x00006E20;
return I2C_SUCCESS;
}
interrupt void i2c_isr(void) // I2C-0
{
uint16_t IntSource, i;
// Read interrupt source
IntSource = I2caRegs.ICIVR.all;
// Interrupt source = stop condition detected
if(IntSource == I2C_SCD_ISRC)
{
// If completed message was writing data, reset msg to inactive state
if (CurrentMsgPtr->MsgStatus == I2C_MSGSTAT_WRITE_BUSY)
{
CurrentMsgPtr->MsgStatus = I2C_MSGSTAT_INACTIVE;
}
else
{
// If a message receives a NACK during the address setup portion of the
// EEPROM read, the code further below included in the register access ready
// interrupt source code will generate a stop condition. After the stop
// condition is received (here), set the message status to try again.
// User may want to limit the number of retries before generating an error.
if(CurrentMsgPtr->MsgStatus == I2C_MSGSTAT_SEND_NOSTOP_BUSY)
{
CurrentMsgPtr->MsgStatus = I2C_MSGSTAT_SEND_NOSTOP;
//send_string("Retry\n\r"); //jel1
}
// If completed message was reading EEPROM data, reset msg to inactive state
// and read data from FIFO.
else if (CurrentMsgPtr->MsgStatus == I2C_MSGSTAT_READ_BUSY)
{
//send_string("Read2"); //jel1
CurrentMsgPtr->MsgStatus = I2C_MSGSTAT_INACTIVE;
for(i=0; i < CurrentMsgPtr->NumOfBytes; i++)
{
CurrentMsgPtr->MsgBuffer[i] = I2caRegs.ICDRR;
}
I2c_flag = 1;
}
}
} // end of stop condition detected