Tool/software: TI C/C++ Compiler
Hi,
I am trying to establish communication between I2C0 and I2C1 on TMS320C6713 DSK kit. I2C0 is configured as MASTER while I2C1 is configured as SLAVE. Following is the code i wrote for it:
/*********************************************************/ //I2C0 registers configuration, AS MASTER /*********************************************************/ //Previously defined macros Registers /* PUT I2C0 in Reset state */ I2C0MDR_REG &= (~(1UL << 5 )); I2C0OAR_REG = 0x0; I2C0IER_REG = 0x0; //disable interrupts //PRESCALE register divider, Fp = SYSCLK2 / (PSC +1) I2C0PSC_REG = 0x4; // SYSCLK2 = 55, SO Fp = 11MHz (MUST BE BETWEEN 6.8 AND 13.3 MHZ) //I2C clock = 220khz I2C0CLKH_REG = 20; I2C0CLKL_REG = 20; I2C0SAR_REG = 0x50; //given to I2C1 as slave I2C0CNT_REG = 3; //BYTES TO TRANSFER /*********************************************************/ //I2C1 registers configuration, AS SLAVE /*********************************************************/ DEVCFG_REG |= 1; //enable I2C1 in device config register. mcBSP1 disable I2C1OAR_REG = 0x50; //own address used by master I2C1IER_REG = 0x0; //disable interrupts //enable I2C1 as Slave I2C1MDR_REG = 0x2020; //also tried with 0x0020 only. //enable I2C0 as Master WITH start stop conditions I2C0MDR_REG = 0x2e20; while (~(I2C0STR_REG & 0x1000)); // WAIT FOR BUS FREE //write data to be send I2C0DXR_REG = 0x11; // WAIT for the bits to be transferred while (~(I2C0STR_REG & 0x0010)); // <============================= /*** THE PROGRAM STUCK IN THE ABOVE WHILE LOOP FOR EVER. THE BITS ARE NOT TRANSFERRED. Also no clock is observed at SCL during data transfer. ***/
AS mentioned in the last comment, using oscilloscope no clock is detected at SCL line and ICXRDY bit of I2C0STR register is always 0 indicating bits are yet not transferred. Kindly direct me to the point where there is possible error in the configuration.
Regards,
