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RTOS/TMDSLCDK6748: Program stops in Board_moduleClockEnable()

Jiawei Zhu
Intellectual 600 points
Part Number: TMDSLCDK6748
Other Parts Discussed in Thread: OMAPL138

Tool/software: TI-RTOS

My tcp/ip test program sometimes stops in Board_moduleClockEnable()

I used reset button to reset the board and rerun my program, it still ran into it.

I unplugged the power cable and reconnect it. the problem disappeared. What cause this situation? How can avoid it?

PS: my environment is LCDKC6748, ccs7, pdk_omapl138_1_0_1, ndk_2_20_06_35

  • 0
    TI__Guru 65405 points
    I've forwarded your query to the software experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • 0
    TI__Guru** 114410 points

    Next time, you run into this issue, we recommend that you look  at which module does this occur on. there are multiple module enabled int he board library ass you can see inthe file lcdkOMAPL138_clock.c

    /* Enable clock for the modules under PSC0 */
    Board_moduleClockEnable(CSL_PSC_CC);
    Board_moduleClockEnable(CSL_PSC_TC0);
    Board_moduleClockEnable(CSL_PSC_TC1);
    Board_moduleClockEnable(CSL_PSC_EMIFA);
    Board_moduleClockEnable(CSL_PSC_SPI0);
    Board_moduleClockEnable(CSL_PSC_MMCSD0);
    Board_moduleClockEnable(CSL_PSC_AINTC);
    Board_moduleClockEnable(CSL_PSC_UART0);
    Board_moduleClockEnable(CSL_PSC_SCR0_SS);
    Board_moduleClockEnable(CSL_PSC_SCR1_SS);
    Board_moduleClockEnable(CSL_PSC_SCR2_SS);

    /* Enable clock for the modules under PSC1 */
    Board_moduleClockEnable(CSL_PSC_EDMA_CC1);
    Board_moduleClockEnable(CSL_PSC_USB20);
    Board_moduleClockEnable(CSL_PSC_USB11);
    Board_moduleClockEnable(CSL_PSC_GPIO);
    Board_moduleClockEnable(CSL_PSC_UHPI);
    Board_moduleClockEnable(CSL_PSC_EMAC);
    Board_moduleClockEnable(CSL_PSC_MCASP0);
    Board_moduleClockEnable(CSL_PSC_VPIF);
    Board_moduleClockEnable(CSL_PSC_SPI1);
    Board_moduleClockEnable(CSL_PSC_I2C1);
    Board_moduleClockEnable(CSL_PSC_UART1);
    Board_moduleClockEnable(CSL_PSC_UART2);
    Board_moduleClockEnable(CSL_PSC_MCBSP0);
    Board_moduleClockEnable(CSL_PSC_MCBSP1);
    Board_moduleClockEnable(CSL_PSC_LCDC);
    Board_moduleClockEnable(CSL_PSC_EPWM);
    Board_moduleClockEnable(CSL_PSC_MMCSD1);
    Board_moduleClockEnable(CSL_PSC_UPP);
    Board_moduleClockEnable(CSL_PSC_ECAP);
    Board_moduleClockEnable(CSL_PSC_EDMA_TC2);

    I suspect that on AINTC module init causes this issue on C6748, I would try to comment this out and give this a try again. We ran into an issue with the GEL file recently that was being caused by AINTC, this module is not present on C6748 but available on OMAPL138 so it shouldn`t be turned on by the DSP.

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Intellectual 600 points
    I have commented out the line "Board_moduleClockEnable(CSL_PSC_AINTC);" and rebuilt the board library.
    This issue is not occured again. your answer is CORRECT.

    Thank u, Rahul Prabhu.