C6000 Single Core DSP

Browse by Tags

C6000 Single Core DSP

Welcome to the C6000 Single Core DSP Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

Sign In to Post
Tags
You have subscribed to this tag. To view or manage your tag subscriptions, click here.   Close
You have unsubscribed from this tag. To view or manage your tag subscriptions, click here.   Close
You are currently viewing:
672x
Related Posts

  • Forum Post: Re: c672x bootloader + I2C EEPROM Secondary Bootloader

    Brad Griffis
    rsp 1. The primary bootloader (in ROM of C672x) copies only 1024 bytes from any chosen external source, i.e. I2C, SPI, Asynchronous.. Memories. Please see the app note "Using the TMS320C672x Bootloader" found in the product folder. http://focus.ti.com/docs/prod/folders/print/tms320c6727b.html...
    on Jun 12, 2008

  • Forum Post: Re: L2 ram latency

    Brad Griffis
    The internal memory is all single-cycle data access. This is mentioned on the first page of the data sheet under the "Enhanced Memory System" bullet. For instruction accesses everything must go through the L1P. So for a "hit" in L1P the instructions will execute in a single cycle...
    on Jun 13, 2008

  • Forum Post: Re: C672x Flash access problem

    Brad Griffis
    2. Does Anybody have simple routines to access the flash. The routines which we have from a development board are huge. By "access" do you mean read or write? Once the EMIF is configured you shouldn't need to do anything special for a read. You just access it like any other address. You'd...
    on Jun 18, 2008

  • Forum Post: 64-bit read issue on C6726 EMIF

    ralwood
    Hello, I'm working on porting a project from a custom C6713 board to a custom C6726 and have noticed an issue: 64-bit reads from external memory (SDRAM) don't work properly. Some pseudocode: { extern double iramVar; //allocated in IRAM extern double sdramVar; //allocated in external memory sdramVar...
    on Jul 16, 2008

  • Forum Post: Re: burning flash for bootloader

    Brad Griffis
    This is likely due to the fact that 6727 has only 13 address lines. The secondary bootloader likely needs to utilize some GPIO to page through flash. There was lots of good discussion in this thread: https://community.ti.com/forums/t/78.aspx Brad
    on Aug 14, 2008

  • Forum Post: Re: C6727 : boot from prallel flash

    Brad Griffis
    So did you write your own assembly boot loader? Can you post it (at least the first bit)? How did you go about getting your code to start at 0x10000004?
    on Aug 20, 2008

  • Forum Post: Re: SPI configured with dMAX

    Brad Griffis
    Why not do this: Assert the chip select Do two 16-bit transfers. De-assert the chip select. From the perspective of the signals, I don't think you could tell the difference. Just make sure to do the transfers in the right order. If the slave is expecting MSB-first, then you would need...
    on Sep 13, 2008

  • Forum Post: Re: C6727 : boot from prallel flash

    Ashwin5763
    Thanks for this info. We will be soon getting the 6727 Evaluation boards. Our scheme will be to Boot from Parallel Flash and then transfer the code to SDRAM. This is the basic requirement for the secondary boot-loader which we are planning to implement. Is there any other boot-scheme which can suffice...
    on Oct 8, 2008

  • Forum Post: Re: C6727 : boot from prallel flash

    Ashwin5763
    In our applciation our executable code will be in FLASH which needs to be transfered to SDRAM at boot-up. So the program will run from SDRAM. Using the AIS will this be possible. We need to have Active PERL ver 5.8.4 for execution of AIS tools (e.g. genAIS.pl). Let us know if any version after 5.8.4...
    on Oct 30, 2008

  • Forum Post: I2C first byte transmission problem with TMS320C6720

    J.F Gagnon
    Hi! I am working on an electronic drum as a final school project and we are using the TMS320C6720. Right now , i am working on the I2C and i have a problem. Whenever i begin a transmission, i always get a dummy byte sent first (0x00) even though i set the first byte to be 0x40 ( write address of the...
    on Mar 24, 2009

  • Forum Post: Re: CSL c672x document is not enough.

    hiro10784
    thank you, randy. but, sample program is not enough too for me. There is a lot of MAGIC NUMBER like 'CSL_DMAX_LOPRIORITY_EVENT1_UID' descrived in header file, but not descripted about them in any document. If I want to change the mode from the example-prg, how can I do it ?? it seem to...
    on Apr 22, 2009

  • Forum Post: HELP! 6727 DSP/BIOS how to simulate a Hardware Interrupt(HWI)?

    yang guo
    my program is like this: #include "Configuration1cfg.h" #include"hwi.h " void main() { HWI_enable(); LOG_printf(&LOG0,"jjjjjjj"); } void HWI_int555() { LOG_printf(&LOG0,"bbbbbbb"); } I config the DSP/BIOS and connect the pin. But the interrupt...
    on Jul 29, 2009

  • Forum Post: C6727 : boot from prallel flash

    mano
    hello has anyone succeeded to boot from prallel flash using C6727 ? I followed the instruction on the "using the tms320c672x bootloader" pdf (section 2.2),and I can't manage to boot from flash; I wrote simple code thats bilnks a led on my board and its running perfectly. I maped...
    on Aug 20, 2008

  • Forum Post: Problem of trigger a dMAX in 6727b

    yang guo
    I have a problem with how to tigger a dMAX event in 6727B.I use the event[2] and according to the ducoment TMS320C672x DSP Dual Data Movement Accelerator,the event can be trigger by CPU toggling a bit in the register DETR. I follow the example make a rise edge like this: DETR = 0x00000000; asm("...
    on Aug 6, 2009

  • Forum Post: Can the PADK be programmed without usb or jtag Emulator?

    manferd
    I have the PADK (tms320c6727) and I don't have access to a jtag Emulator and I can't install the usb drivers onto my 64-bit computer because they are unavailable for 64-bit systems. Can the PADK be programmed through the rs-232 port? If so, how? The usb drivers for the PADK came with some source...
    on Sep 23, 2009

  • Forum Post: Analog loopback latency

    leargaf
    Hi I have a PADK board with a C6727 DSP. I'm running an example analog loopback project that came with the board. It uses MCASP to produce an echo from analog input to analog output. The problem is latency seems to be too high, around 1.5 ms when sampling one frame at 192 KHZ. Is there a way to...
    on Dec 10, 2009

  • Forum Post: TMS320 C672x questions from a beginner.

    MegaDocent
    Hello! I am a beginner developer. Though I plan to be engaged in it further, it is my first experience in the field. Now i work with TMS320 C672x (sprs370e) I read many appnotes and other useful info, but i don't understand some things. I am unsure about right understanding some things. My problem...
    on Feb 16, 2010

  • Forum Post: Is most suitable DSPLIB to use in a C67x+ core

    Hide35551
    Champs, Is most suitable DSPLIB to use in a C67x+ core good in SPRC121? Is there the method to optimize SORC121 for C67x+ cores? Best regards, Hideaki Maeda
    on Mar 30, 2010

  • Forum Post: C6727 boot problems

    yang guo
    i use parallel FLASH mode to boot my code as the documents "Using the TMS320C672x Bootloader" says. I use BIOS In my project , there have a problems is that BIOS generat a .cmd document and the Bootloader have a .cmd ,too.when i bild this project there have error like this: <Linking>...
    on May 6, 2010

  • Forum Post: Problem with McASP in TMS320C6726

    MegaDocent
    Hello. I have a problem with McASP in TMS320C6726. Please, check my reasoning and write me where is a error. I need to receive E1 - 32 slots, 8 bit in slot. So, i have to use TDM mode with 32 slots, 8 bit in slot without padding. I want to use 1 data pin, RCLK pin and RFSR pin and don't use transmit...
    on Jul 12, 2010

  • Forum Post: How to use SPI slave bootloader in TMS320C672x?

    Pan Kim
    Hi, By SPRAA69D there have several boot modes for TMS320C672x. But on SPRZ232F, it mentes out that I2C mode is not always function correctly and SPI master boot mode is not recommended too. So, the boot mode is just of HPI, Parallel Flash and SPI Salve. I use TMS320C6720 as development evaluation, the...
    on Jul 13, 2010

  • Forum Post: On DA708 board, problem faced while loading and running the executable

    prasanna joshi
    Hi, I build executable in CCS 3.1 C672x XDS510USB emulator. When i loaded that executable on the target and run, it was hanging and it didn't come out. When i again loaded the same executable and run, it ran completely and came out. When i repeated loading and running continuously the same executable...
    on Jul 14, 2010

  • Forum Post: [C672x] Can dMAX be used for a SPI Master Mode transfer, if so how?

    Paul45899
    Need to run a SPI port in Master Mode and use dMAX also. Documentation only talks about using dMAX for SPI slave mode. If I set up a SPI slave transfer in dMAX for a SPI in master mode and manually start the first transfer, will the SPI generate the proper input events to cause the slave transfer...
    on Aug 27, 2010

  • Forum Post: SP Float to Int, rounding behavior

    Steven Tuttle
    In the C67x+ chips, the SPINT rounding behavior is controlled via rounding mode bits in the FPADCR register. Are these bits changed from the power-on defaults by any of the optimized DSP and/or math function libraries? Are there any TI supplied libraries that change these rounding bits from...
    on Nov 5, 2010

  • Forum Post: C6726B External Interrupt and Externl dMAX event

    Toshio Ushikubo
    I'm not familiar with C672x so please confirm if following my understanding is correct. 1. Interrupt from external pins Can I use following pins for external interrupt source? AXR0[7]/SPI1_CLK AXR0[8]/AXR1[5]/SPI1_SOM AXR0[9]/AXR1[4]/SPI1_SIMO AHCLKR2 SPI0_SIMO SPI0_SCS/I2C1_SCL SPI0_ENA...
    on Dec 8, 2010
12

All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with respect to these materials. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.

Content on this site may contain or be subject to specific guidelines or limitations on use. All postings and use of the content on this site are subject to the Terms of Use of the site; third parties using this content agree to abide by any limitations or guidelines and to comply with the Terms of Use of this site. TI, its suppliers and providers of content reserve the right to make corrections, deletions, modifications, enhancements, improvements and other changes to the content and materials, its products, programs and services at any time or to move or discontinue any content, products, programs, or services without notice.

TI Worldwide | Contact Us | my.TI Login | Site Map | Corporate Citizenship | mobile m.ti.com (Mobile Version)

TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs and
embedded processors, along with software, tools and the industry’s largest sales/support staff.

© Copyright 1995-2013 Texas Instruments Incorporated. All rights reserved.
Trademarks | Privacy Policy | Terms of Use