C6000 Single Core DSP

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6748
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  • Forum Post: C6748 USB0 example code initialization failure (SYSCFG / PLL setting failure)

    Uri Shkolnik
    Hi, I would like to build a C6748 DSP firmware which activates the USB0 as USB peripheral (device). For the first stage I'm trying to use the BIOSUSB's example "usbdevhid". Environment: LogicPD's Zoom OMAP-L138 eXperimenter Kit. CCS 4.1 BIOSUSB 1.10.1 Gel...
    on Mar 7, 2010

  • Forum Post: We need a C6748 Contractor in the Boston Area

    Steve Araiza
    I am not a recruiter, I am an engineer. I hope I am allowed to post this type of question here. We have selected a TSM320C6748 for a design, and we are new to TI DSPs. We would like to contract with a local TI DSP expert to speed up our development. There is a mountain of new stuff to learn, and having...
    on Apr 16, 2010

  • Forum Post: C6748 EMIFA Questions

    llsmberly
    I got these today and wanted them to be answered in the forum. 1) I couldn't find much information about "EMA_A_RW" pin D10. The only info I found was on TMS320C6748 datasheets. In one of the tables pin functionality was described as "EMIFA Async Read / Write control"...
    on Apr 22, 2010

  • Forum Post: Re: exception triggered in _DSPF_sp_ifftSPxSP - Bug?

    Dave50917
    Has there been any update or resolution to this issue?
    on May 28, 2010

  • Forum Post: Multiple UART interfaces

    Uri Shkolnik
    Hi, [[ Env.: C6748 DSP, CCS4, PSP 1.30.1 ]] I'm trying to initialize and use multiple UARTs interfaces simultaneously. UART2 works "out of the box" (using the example given within the PSP) I couldn't find a way to initialize and use UART0 and UART1 (all UART work at...
    on Jun 3, 2010

  • Forum Post: DDR2 Configuration problem

    Uri Shkolnik
    All, I'm using DDR2: MT47H32M16 (8 Meg x 16 x 4 banks), which is connected to the C6748 mDDR/DDR2 interface. I have a weird problem - If a program is linked (all sections) to IRAM, everything works, and I can run memory tests (on the DDR2), access it (using JTAG memory access) etc...
    on Jun 14, 2010

  • Forum Post: C6748 Edma3 with McASP in Ping Pong Mode

    Bruno Scherrer
    Hi, I need some help for implementing Dma transfers in Ping pong mode between McAsp and Memory for a C6748 without DspBios Environment to start with. Thank's in advance for Your Help
    on Jun 16, 2010

  • Forum Post: Custom code inserted by AISGen

    James Jurack
    I am creating a custom AIS boot script for a C6748, and I noticed that if I use AISGen to create a script, it includes a small application that is loaded at 0x00800000 and executed using the Jump command, after what appears to be using the Boot Table command to set up its stack. Can anyone tell me what...
    on Jun 17, 2010

  • Forum Post: [C6748] 2.6v problem

    Yasuhisa Kato
    Hi, In case of no external pull-down to RESET pin, 1.8v net shows correctly 1.8v. However, when attached an external pull-down and applied HIGH voltage to RESET pin, 1.8v net shows always 2.6v, the current is flowing from C6748 to the power device. Is this a likely issue related to the errata...
    on Jul 2, 2010

  • Forum Post: Re: [C6748] 2.6v problem

    Yasuhisa Kato
    Hi Mukul and Brad, Thank you very much for the quick response! > this detection circuit will not work reliably unless it is ensured that during the entire power up sequence (1.2V supply --> 1.8V -->3.3V supply) the RESET signal is not low. In our system, all DVDD3318_A/B...
    on Jul 2, 2010

  • Forum Post: Re: Select Device

    June He
    Dear Daniel Thanks for you suggestion, I have looked up in TI's website, and also have looked at the datsheet about TMS320C6745/6747 , However , no QFP [PYP suffix] were be founded, just only BGA [ ZKB suffix] package for TMS320C6747, and 6748 too. Are you sure that the 6747 include QFP(Quad...
    on Jul 3, 2010

  • Forum Post: Re: C6748 Slow Speed?

    TK LEE
    Thank you. I checked the value of ullTimeDiff, it was about 3,000,000,000 after 10s and maybe it was good result. It says 300MHz. I use CCS3.3 and XDS510USB and Code Generation Tools 6.1.9. I have tested another method. Using EVM by LOGIC, I view timing in Oscilloscope. The signal was...
    on Jul 9, 2010

  • Forum Post: C6748 - SPI

    Bruno Scherrer
    Hi, In my desing i am using 2 codecs ( tlv320aic3106 ). As a configuration port I'm using SPI instead of the I2C port (used on the C6748 SOM module). unfortunately I didn't realise the amount of effort that I will need to bring SPI to work... It will be very helpfull if anybody...
    on Jul 13, 2010

  • Forum Post: How do I connect an ads8327 to a C6748 ?

    Bruno Scherrer
    Hi, Another question : Is it possible (I am sure it is...) to connect an ads8327 ADC to one of the C6748's SPI Port ? I my application I will need the ADC to work in AUTO TRIGGER mode. As far as Pin connexion is concerned, here is what I've understood : (ADC) SDO connect to : ...
    on Jul 13, 2010

  • Forum Post: C6748 RTC

    369114
    I have a need for two different applications, one that uses the RTC and one that does not use the RTC on the TMS320C6748 device . In both applications (RTC on and RTC off), we wish to decrease power consumption as much as possible. In the application that uses the RTC, we plan on powering...
    on Jul 19, 2010

  • Forum Post: C6748 HPI

    Bruno Scherrer
    Hi, Actually I managed to write a piece of code for initializing the HPI. My first test is to try to read the HPIC reg but it doesn't seem to work so well. I have a quite simple question to start with : Does /HPI_READY need a pull-up resistor ? if yes is it possible to use an internal...
    on Jul 23, 2010

  • Forum Post: Re: Writemsg() takes 99% +++

    Uri Shkolnik
    Hi all, Anyone knows why some DSP/BIOS functions issues LOG messages?? For instance SEM_postBinary() When I run long program, which uses certain DSP/BIOS (5_41_02_14) functions, it spends most of its time within writemsg() and readmsg() context !!! Any idea? Uri
    on Jul 25, 2010

  • Forum Post: Altera FPP configuation with EMIFA?

    Ryan Bishop
    I was thinking about using the EMIFA on a C6748 to configure an Altera Cyclone III FPGA in their "fast passive parallel" (FPP) mode. It seems like this should be possible by using a few GPIO lines to control the Altera config pins. The EMIFA could then read the configuration data file from...
    on Jul 28, 2010

  • Forum Post: Accessing UART2 via the Chip Support Library

    Helge Rasmussen
    Hi, I am working on a 6748, and try to use the UART2 port by using the CSL. The best example I have found is in ti\pspiom\cslr\evmOMAPL138\examples\uart\src\uart_example.c Unfortunately this is only demoing loopback, not using the port for real, so my first question is: Is there a better example...
    on Aug 10, 2010

  • Forum Post: uPP driver on 'C6748 for CCS 4.1

    PaulSchoenke
    We are having difficulty getting the uPP driver to show up in DSP/BIOS. We’ve looked on the web, BSP examples etc. There is a lot out there for CCS3.x but we have not found anything for CCS 4.X Any examples or help would be much appreciated. Thanks!
    on Aug 13, 2010

  • Forum Post: UPP pin muxing

    Ryan Bishop
    I know I saw an explanation for this either on the forum's or the wiki, but now I can't seem to locate it... In the OMAP/c6748 pin muxing program, the UPP control pins for Channel A are labeled as UPP_CH1... and the Channel B control pins appear to be labeled as UPP_CH0..., which leads to...
    on Sep 1, 2010

  • Forum Post: C6748 SPI T2CDELAY

    369114
    Reference SPRUFM4G – TMS320C674x/OMAP-L1x Processor Serial Peripheral Interface (SPI) User's Guide · 2.5.1.2 Chip Select Hold Time · Table 24. SPI Delay Register (SPIDELAY) Field Descriptions · Figure 30. Example: t T2CDELAY = 4 SPI Module Clock Cycles ...
    on Sep 3, 2010

  • Forum Post: C6748 USB2.0 CDMA Double Packet Buffering

    Hiro
    Hi Champ ! My customer asked regarding to C6748 USB CDMA usage. Assumption is they are using "Peripheral Mode". They try to use CDMA (Transparent mode) and will be enabled "Double Packet Buffering" (DPB=1 of TXFIFOSZ and RXFIFOSZ) then transmit and receive will be failure...
    on Oct 14, 2010

  • Forum Post: Re: C6748 USB2.0 CDMA Double Packet Buffering

    Hiro
    Dear Tlee-san. Thank you for your quick response. I asked to customer regarding to your question. But I have not yet. Maybe next Monday I can let you know so please wait it. Thank you for your cooperation. Regards. Obara.
    on Oct 15, 2010

  • Forum Post: Re: C6748 USB2.0 CDMA Double Packet Buffering

    Hiro
    Hi Tlee-san. I got information regarding to BIOS. They use DSP BIOS6 but there is nothing USB driver corresponding to BIOS6 so they are not using BIOS USB driver. Is it make sense as my answer ? I'm looking forward to getting solution. Regards. Obara.
    on Oct 15, 2010
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