C6000 Single Core DSP

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C6455
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  • Forum Post: CSL for C6455 and CCS

    Mariana
    Did you know that the CSL for C6455 is made to work with CCS 3.3? So if you have CCS 3.1 and earlier versions, you will need to update it in order to use it. This information is in the release notes of the CSL itself, which you can download at the link: http://focus.ti.com/docs/toolsw/folders/print/sprc234...
    on Jun 6, 2008

  • Forum Post: Re: Performance of EDMA3 Transfer Controller?

    TimHarron
    Please provide specifics of both transfers - what changed between the first and second transfer? Will you please also reference the specific section in the documentation?
    on Jun 18, 2008

  • Forum Post: Re: Performance of EDMA3 Transfer Controller?

    Brad Griffis
    What do you mean by "increase in DMA waits"? Are you saying it takes longer for the DMA to complete the transfer? Yes, if you're only doing 8-bit transfers then you should expect the DMA to transfer things inefficiently. That said, the whole point of the DMA is to not make the CPU wait...
    on Jun 22, 2008

  • Forum Post: Re: Interrupt problem on the DSK6455

    Brad Griffis
    Check out c6455.c. In the function HwPktOpen() you can see the following sequence: HWI_eventMap( IntVector, 17); HWI_dispatchPlug( IntVector, (Fxn)HwInt, -1, 0 ); In this code IntVector=5 which is trampling on your code. At least that's what I think is happening. Please confirm.
    on Aug 26, 2008

  • Forum Post: Re: Interrupt problem on the DSK6455

    Brad Griffis
    Whoops, that was a typo. I was trying to say check out "c6455.c". I'll edit my original post. You might be right in that I'm not sure if it's provided with the eval version. In any case, I'm glad your issue is resolved. Thanks for letting us know. Brad
    on Aug 27, 2008

  • Forum Post: Re: problem with DSK6455/EVM6455 and CCS 3.3

    Mariana
    Brad, I think Amit means at CCS Profile->Clock - you can Enable and View. Amit, with the full version of CCS (not the one that comes with the DSK) you can connect both ways as Brad said. I just tested the clock with xds510 and it worked....
    on Oct 25, 2008

  • Forum Post: c6454 GPIO HWI

    steve
    Hi, I am trying to use a GPIO signal as a HWI on a TMS320C6454 DSP. The HWI I created is never executed. I will try to explain what I am doing to set up the HWI. Let's say I'd like to use GP[6] rising edge for the HWI. In main(), I configured the GPIO registers as follows: GP[6] is set as...
    on Nov 11, 2008

  • Forum Post: C6455 - SYS Handlers set by TCF - Can we set them programmactically?

    Jonathan Tate
    Is there a way to set the SYS handlers programmatically rather than editing the TCF file?
    on Dec 17, 2008

  • Forum Post: C6000 updates for Code Generation Tools

    SteveM
    It seems that for each new update for C6000-CGT it get more difficult to download the file from the Update advisor webpage. I'm trying to download v6.1.7 at the moment and I can't get a response from the server. I can download earlier versions (e.g. v6.0.3) just fine. Has anyone else observed...
    on Jan 16, 2009

  • Forum Post: Re: 6455 writing bytes to the EMIF

    TimHarron
    lester davis My question is because of the way my Hardware is connected i need to use AAWE#/ASWE# for the clock and ACE2# for write enable. Is it possible to set up the EMIF like this? The EMIF peripheral pins are designed to perform a specific function. ACE2# will always be a chip select, and AAWE#...
    on Mar 24, 2009

  • Forum Post: interfacing C6455 with an external ADC

    Francesco Montorsi
    Hi all, First of all: I'm rather new to the DSP world and I have to start with a non-trivial task... I have the TMS320C6455 EVM board. I need to interface it with an external ADC which runs at about 80MSPS. I have two options: a) an ADC with a serial LVDS output (which thus sends digital...
    on Apr 29, 2009

  • Forum Post: Re: help needed!!!!

    RandyP
    Since your question has to do with how to use the C6455, it is appropriate to post it in this forum. And thank you for sending your posting to the TI E2E Community. And you have chosen a very powerful DSP. Since you are new to DSP, please permit me to talk like an old-timer. One of the most helpful...
    on May 14, 2009

  • Forum Post: Re: Cannot write to GPIO DIR register on 6455

    TimHarron
    You might want to double check your GEL file. Typically the GEL file will set up a virtual memory map that CCS can use to prevent reads/writes to invalid memory (a sort of fail-safe for the user). If the GEL file does not specify this memory as valid RAM (via GEL_MapAdd() function) this could prevent...
    on May 14, 2009

  • Forum Post: 6455; can not get the core to operate at 1 GHz.

    Rob Figler
    We are unable to get the 6455 DSP core up to 1GHz. We are using an external 33MHz oscillator to drive CLKIN1 to the DSP. When we set the PLLM multiplier to x20 the XDS510 connects to the DSP just fine. However, when we put in a PLLM multiplier of x30 to get to ~1GHz we are not able to connect to...
    on Jun 2, 2009

  • Forum Post: Migration from RAM image to flash image on C6455

    Shawn12883
    Hi, Everyone, We have been using C6455 DSK, CCS 3.3, and DSP/BIOS 5.33.04 to develop our application. Now we would like to boot from flash. With spra999a as a guideline, we wrote a secondary bootloader that (1) Disables L1 and L2 caches, (2) Copies our application from flash to L2, (3) Zeros out uninitialized...
    on Jun 26, 2009

  • Forum Post: LDW from L2 in 6455

    Sevan Varypaev
    Does anyone hade this problem? May be someone knows the solution?
    on Jul 2, 2009

  • Forum Post: Re: LDW from L2 in 6455

    Sevan Varypaev
    Thanks. So if I understand correctly, functions with many LDW instructions will execute much more faster on 6416 then 6455 because of read-misses? For example 8k points FFT (more than L1D) on 6455 will executed slower then on 6455?
    on Jul 3, 2009

  • Forum Post: Boot App via TFTP on C6455

    Shawn12883
    Hi, All, We are using DSK6455 to implement a TFTP boot. Our scheme is "Secondary bootloader in flash (0xB000_0000) ===> Tertiary bootloader in DDR (0xE000_0000) ===> (Down)Load app to L2 via TFTP ===> Jump to _c_int00 in app". Our questions are: (1) Into what format should the...
    on Jul 8, 2009

  • Forum Post: Re: Boot App via TFTP on C6455

    TimHarron
    Shawn (1) Into what format should the app be converted for downloading and what utility should we use? Follow this User's Guide . Shawn (2) Is there any off-the-shelf loader code/image we can use in our tertiary bootloader? This is not something for which I have ever seen any collateral. TFTP boot...
    on Jul 9, 2009

  • Forum Post: 6455 TCP2 is not right

    yong zhang
    hello,now iam using the 6455 TCP2,but i have a question.i followed the tcp2 standalone example to write my program.i am quite sure that the configuration about the TCP2 is right and the input data format is (4.2)format ,interleave table and the tail data is also ok,I am sure,they are all right. but i...
    on Jul 17, 2009

  • Forum Post: Fail to get the valid time information by using CSL_tscRead

    Renaissance
    In one of my project, I suddenly could not use CSL_tscRead to get the valid time information, while my other projects still could. It is so confusing. Can any of you could give me a hint on what may be going wrong? Thanks a lot Here is the code where I want to estimate the running time by using CSL_tscRead...
    on Jul 28, 2009

  • Forum Post: Re: 6455 SPI/MCBSP configuration problem

    jiefu zhou
    I have the same problem with Brady. I configure the related register as spra487, from the DXR register, the XEMPTY and XRDY bits in SPCR register, it seems the data have been send out, however, no clk could be detected at clk. I also tried the example Mariana gived, there is no clk output too. ...
    on Aug 23, 2009

  • Forum Post: Problem when using SPI at C6455

    jiefu zhou
    I have met problem when using SPI at C6455, the configuration is based on SPRU580G and SPRA487,there is no outout at the signal CLK and DataOut of SPI, I have noticed there was the same problem at the forum link: http://e2e.ti.com/forums/t/5359.aspx The problem is almost same with Brady, the data in...
    on Aug 23, 2009

  • Forum Post: EMIF clock on TMS320C6455 DSK

    Vladimir Podosinov
    Hi, I have a TMS320C6455 DSK kit from Spectrum Digital. I am trying to clock an external DAC with parallel input, and using Asynchronous EMIF write for that. I guess here are couple of the questions: 1. AECLKOUT which suppose to be used by EMIF cycle can be up to 166 MHz, which means with 2 cycle...
    on Aug 26, 2009

  • Forum Post: Re: SRIO Message Passing on C6455

    RandyP
    Attached is EVM6455_SRIO_MSGQ.zip which has an example for using SRIO through the DSP/BIOS MSGQ tool. You will need to have the DDK installed and the latest version of BIOS would be good. I am using BIOS 5.31.09. The steps to run this example are: Unzip this into your CCS 3.3 MyProjects folder...
    on Sep 18, 2009
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