C6000 Single Core DSP

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C6457
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  • Forum Post: C6457 EMIF-HPI Link

    Craig Neely
    Hello, I'm designing a board around the C6457 processor and I can't find an important bit of info in any of the data sheets. Which bus voltage do the EMIFA, HPI, and GPIO peripheral ports use? 1.8V or 3.3V? I'm embarrassed to ask something so basic, but I've looked everywhere I...
    on Oct 11, 2009

  • Forum Post: Re: C6457 EMIF-HPI Link

    Craig Neely
    Hi Brandon, Thanks for the reply. That's good news that the EMIFA port is 3.3V as it means I can go to the DM6437's HPI w/o level shifters. Are you certain on the GPIO port? I was guessing it was 1.8V as the Lyrtech schematics for the EVM have boot mode pull-ups to 1.8V on those pins for...
    on Oct 11, 2009

  • Forum Post: Re: C6457 EMIF-HPI Link

    Craig Neely
    Thanks Travis. Though, I have another related datasheet vs. EVM schematic problem I just discovered regarding I2C. If you could, please go to the EVM schematic at http://www.mylyrtech.com/docs/public/Schematic_C6457evm_r01b4.pdf and check out pages 12 and 22. They're using pull-up resistors to...
    on Oct 13, 2009

  • Forum Post: Latchup protection on the C6457 DSP

    Craig Neely
    Hi, I have a quick question: Are the C6457 IO ports (GPIO / EMIF / I2C / clock buffers, etc) protected against latchup caused by applying signal voltages before the processor has been fully powered-up? I ask because the processor has very specific power-sequencing requirements (DVDD18 -> CVDD11...
    on Jan 7, 2010

  • Forum Post: Re: C6457 Datasheet

    Craig Neely
    Hi Toshio , For PLLDIV3, I saw this typo as well. I suspect that the correct address is 0x029A 0120 as this is the address found in the GEL file for my C6457 EVM board from Lyrtech. I have not yet verified this though. // PLL 1 definitions (DSP clk and subsystems) #define PLL1_BASE 0x029A0000...
    on Apr 4, 2010

  • Forum Post: C6457 DDR2 DMCCTL register -- datasheet question / error + setup question

    Craig Neely
    Hi, The DMCCTL register for the C6457's DDR2 perhipheral is listed on pg.48 of sprugk5b as having the structure: But, on pg.37, the description mentions an IFRESET bit, which is nowhere to be found, except on the C6455. It looks just like a leftover from the C6455's datasheet,...
    on Apr 7, 2010

  • Forum Post: McBSP detecting FSX high in clock stop SPI mode

    Rob Beck
    I'm using the C6457 McBSP in SPI (clock stop) mode. The C6457 is the master and I am driving a codec, a VLSI VS1053b as a slave. The VS1053b has a command and data interface that is selected by a GPIO pin, although it shares the actual SPI pins. What is important is that a transaction for...
    on Apr 13, 2010

  • Forum Post: I2C bootload on c6457

    AndrzejGalas
    Hi, we would like to boot load c6457 from flash on I2C. We are able to read from and write to it. We have used before c5455 an we used to prepare an aplication image in the way described in http://focus.ti.com/lit/an/spraae9/spraae9.pdf. Should it be working with c6457? When we program flash...
    on Apr 14, 2010

  • Forum Post: TMS320C6457 DSPs Hardware Design Guide - Power Supply Layout Recommendations

    Ken Delmage
    I am looking for some clarification on Section 5.4 Power Supply Layout Recommendations in the TMS320TC6484 and TMS320C6457 DSPs Hardware Design Guide (SPRAAV7B - October 2009). The first paragraph states that "... the PCB should include separate power planes for core, I/O, and ground, ..."...
    on Apr 16, 2010

  • Forum Post: C6457 and CCS4.x

    sergey manuhin
    I bought EVM6457 but there are not any drivers for CCS 4.x. And CCS 4 hasn't support c6457 device. How can I add c6457 device support in my CCS4? Where can I find
    on Apr 19, 2010

  • Forum Post: Re: TMS320C6457 DSPs Hardware Design Guide - Power Supply Layout Recommendations

    Craig Neely
    Hi Ken, Each of the DSP's core supplies {3.3, 1.8, 1.2, 1.1} and any filtered versions of those {PLLV1, PLLV2, VDDR18, VDDA11, VDDT11} generally need their own power planes. That doesn't mean that each needs it's own layer though. You can have several planes (essentially a copper pour...
    on Apr 22, 2010

  • Forum Post: C6457 JTAG -- Does anybody have this working?

    Craig Neely
    Hi All, I made a C6457 custom board and I have my DSP up and running. It bootloads & runs code, the DDR2 interface works, and every peripheral I've tried so far has worked. But not JTAG! I'm using a Spectrum Digital XDS560R emulator that works fine with a DM6437 DSP on the same board...
    on Apr 22, 2010

  • Forum Post: Re: Debugging C6457 JTAG interface

    Craig Neely
    Hi Scott, My CCS configuration has 2 entries at the moment. One for a DM6437 that I can connect to, and another for my C6457 that I'm having the JTAG problem with. I'm using CCS 3.3 SR12.1. I found the following .dat files in the \cc\bin\brddat\ directory: ccBrd0.dat (this is most likely...
    on Apr 30, 2010

  • Forum Post: C6457 MP3 encoder

    Rob Beck
    Do TI do an MP3 encoder for the C6457? CBR would be fine, don't need anything too advanced just capable. I've seen the page for the TMDMP3E encoder but the closest it appears to support is the C644x series.
    on May 14, 2010

  • Forum Post: C6457 McBSP stops during Emulation

    Pavan Bhave
    Hi, I am sing CCS4. But everytime I try to emulate the serial McBSP seems to halt. I have set the Free bit in SPCR to 1. Any idea why this is happening? regards, Pavan Bhave
    on Jun 18, 2010

  • Forum Post: C6457 configuration to boot from FLASH or Etherrnet

    Bryan Busacco
    We would like to set up a C6457 on a board that allows us to boot from either the FLASH connected to the EMIF, or Ethernet. Based on how we connect our system to the outside world, we will want to have either method available at all times. Is there a way to configure the DSP that allows us to boot from...
    on Jul 14, 2010

  • Forum Post: Re: C6457 configuration to boot from FLASH or Ehterrnet

    Marc DAmato
    Yes this is possible. I would also ask is this a one-time setup? Meaning how you connect to the outside world or do you need to change it on the fly? If on the fly, i'll respond to your response. Yes, C6457 does support EMIF and Etherne Bootmode among other options. First, from the main www.ti...
    on Jul 15, 2010

  • Forum Post: C6457 CSL for PSC

    Rob Beck
    I have a few questions on the C6457 CSL regarding the PSC (power sleep controller). (1) CSL_PscmoduleState PscmoduleState; PscmoduleState.module = CSL_PSC_MODULE_EMIF64; CSL_pscGetHwStatus(hPsc, CSL_PSC_QUERY_MODULE_STAT, &PscmoduleState); One would expect the above code to give either...
    on Aug 18, 2010

  • Forum Post: C6457 SYSCLK6 (CHIP_CLKS) settings when in SPI master

    Rob Beck
    When I set up the PLL I have set the /y divider to /10 so on 1GHz C6457 I should have a 100MHz SYSCLK6. However, when I read back the divider (when the SPI has started) in order to see the status of the PLL I see a divider of /6 for SYSCLK6 which comes out to 166MHz, which according to the manual...
    on Aug 18, 2010

  • Forum Post: ENET boot procedure

    Bryan Busacco
    We would like to use ethernet boot mode on a 6457 DSP and would like to verify how it operates. System configuration: Ethernet connected C6457 with unprogrammed FLASH on the EMIF bus. The goal is to bring up a new board without any preprogrammed memory on the board. Here are the steps...
    on Aug 20, 2010

  • Forum Post: NDK for 6457 & cache problem

    sergey manuhin
    Hi I downloaded NDK2.0 and NSP for TMS320c6457. Then I installed this product and ran the example: hello world. This example works fine while all segments are placed in DDR2 or IRAM and cache is disabled. But when I enable L2 cache, stack crashes. There are no any visual effects, but I can't...
    on Aug 24, 2010

  • Forum Post: C6457 NDK 2.0 DHCP

    Rob Beck
    While running the NDK v2.0 on the C6457 (our own hardware) sometimes the DHCP server starts running with the 000 but then does not proceed to the 017 state and the network address is not added. Analysis with WireShark suggests that when the address is not added and DHCP does not go to state 017 that...
    on Nov 10, 2010

  • Forum Post: Re: Problem with ARP / IP address

    Rob Beck
    I've tried the nearside loop-back test (adapting Lytech code from the dual DSP C6457EVM to use on our single DSP system) and it never fails. I cannot get the connector loopback to work at all. Have any of the TI people any idea why sometimes grat. ARP and before it DHCP discover will emerge on...
    on Nov 18, 2010

  • Forum Post: Re: Problem with ARP / IP address

    Rob Beck
    Looks like two problems going on here which may or may not be connected: (1) (Ethdriver) HwPktTxNext calls (csl_emac) EMAC_sendPacket calls (csl_emac) emacEnqueueTx to queue packet on EMAC. Interrupt handler (Ethdriver) HwTxInt calls (csl_emac) EMAC_TxServiceCheck calls (csl_emac) emacDequeueTx...
    on Nov 23, 2010

  • Forum Post: Re: Problem with ARP / IP address

    Rob Beck
    Just found out something related to DSP core speed and this problem: When I speed up our C6457 to 1GHz core speed on our product hardware the problem goes away. Also, for the Lyrtech C6457EVM if the DSP core (of the DSP I run the software on - the EVM has 2) is slowed down to 600MHz then the same...
    on Nov 24, 2010
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