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C672x
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  • Forum Post: Perl version to run C672x Bootloader Utilities

    Mariana
    The scripts used by the document SPRAA69C were tested with Perl release 5.8.4 and the script genBootCfg requires the Tk module installed. One of the most popular Perl packages available for Windows is ActivePerl and is provided by a company called ActiveState. ActivePerl releases 5.8.x include the...
    on Jun 17, 2008

  • Forum Post: Re: C672x Flash access problem

    TimHarron
    BradGriffis 2. Does Anybody have simple routines to access the flash. The routines which we have from a development board are huge. By "access" do you mean read or write? Once the EMIF is configured you shouldn't need to do anything special for a read. You just access it like any other...
    on Jun 18, 2008

  • Forum Post: Re: C672x Flash access problem

    Brad Griffis
    Ah, yes, that makes sense, Tim. Shouldn't be too hard. Something like this I imagine: uint32_t read_flash32(uint32_t *pFlash) { GPIO_OUT = (pFlash >> 13); return *pFlash; } This may change slightly based on which GPIO pins you hook up. Same principle though...
    on Jun 18, 2008

  • Forum Post: Re: C672x Flash burn utility needed

    TimHarron
    *edited post* Let me try this again. Apparently my mind was switched off for a little while! Traditionally we have used a software package called FlashBurn from a company called Software Design Solutions ( www.softwaredesignsolutions.com ) to burn an on-board Flash on our DSKs and/or EVMs. The C672x...
    on Jun 27, 2008

  • Forum Post: Re: C672x Flash access problem

    C. Olson
    Most code examples I have come across are for dev kits based on the 6727, which are using CPLD's or FPGA's for controlling the upper address lines to the async memory devices. We have a C6726 (tqfp) custom board with a 16-bit 29F800 flash. Using SPRRS370B (Fig4-5) and SRU711B (Fig2-8b and Fig2...
    on Jul 10, 2008

  • Forum Post: Re: C672x Flash access problem

    C. Olson
    ...continuing along with the example above (which was extremely helpful, thanks)...but now focusing on the secondary bootloader process. Since GPIO are required for addresses above 0x90001FFF, I assume this is what TI is referring to as a "page boundary". When the AIS data stream is created...
    on Jul 15, 2008

  • Forum Post: [C6726] Changing Registers

    jyoung
    We are using a C6726 on our custom board. When we are debugging are seeing a problem with seeming random register changes. For example when we step through an assignment that changes a variable that is place in an register (say A2) we see the value of another register (say A15) change at the same time...
    on Jul 15, 2008

  • Forum Post: Re: C672x Flash access problem

    Daniel Allred
    I'm confused as to where you got the page size of 0x2000 from. On a C6727 device, there will be 15 address lines (EM_A[12..0] and EM_BA[1..0]) available when accessingan 8-bit ASYNC memory, 14 address lines (EM_A[12..0] and EM_BA[1]) when accessing a 16-bit device, etc. This leads to page sizes of...
    on Jul 16, 2008

  • Forum Post: C672x GenAIS script error - Not enough Memory on current page for pin config

    C. Olson
    When using GenAIS.pl utility to create the AIS data file, we encounter a "Not enough memory on current page for pin config" error. The page size setting when this error occurs is 0x2000. Increasing the page size to 0x2001 will allow the script to run without error (although the AIS will be...
    on Jul 16, 2008

  • Forum Post: Re: C672x Flash access problem

    C. Olson
    We are using a C6726 (tqfp) with a 16-bit 29F800 flash attached (as suggested in SRU711B Fig2-8b) where A11..A0,BA1 (DSP) are attached to A12..A0 (FLASH), respectively. Since we are using a 16-bit data bus, BA1 is always "0" (byte writes are inhibitied, so we are always accessing even address...
    on Jul 16, 2008

  • Forum Post: Re: C672x Flash access problem

    C. Olson
    I think we are talking about similar points, though I do stand corrected on the use of the BA1 pin. I have been focusing on the physical addressing of the FLASH device (2^13=>0x2000). However, this translates to an address of 0x90004000 on the C672x for FLASH using 16-bit data bus. (C672x software...
    on Jul 17, 2008

  • Forum Post: C6727 : boot from prallel flash

    mano
    hello has anyone succeeded to boot from prallel flash using C6727 ? I followed the instruction on the "using the tms320c672x bootloader" pdf (section 2.2),and I can't manage to boot from flash; I wrote simple code thats bilnks a led on my board and its running perfectly. I maped...
    on Aug 20, 2008

  • Forum Post: Re: Catching floating point exceptions in C

    Brad Griffis
    The 67x/67x+ CPU and Instruction Set Reference Guide spru733 (currently Rev A) has some further details on these status bits. You should look specifically at the FADCR register for catching issues related to floating point add/subtract. You should look at the FMCR for information related to floating...
    on Aug 27, 2008

  • Forum Post: Re: c6727 SPI slave boot mode problem

    TimHarron
    Hello, There are several Advisories in the C6727B Silicon Errata related to the SPI (slave) peripheral - have you checked into these? Harbour 2. Is there any 16 bit SPI slave boot mode examples available from TI ? Pdf mentioned has only 32 bit flash examples. I believe there are only 32-bit examples...
    on Oct 6, 2008

  • Forum Post: Re: C6727 : boot from prallel flash

    Brad Griffis
    Yes! Others have absolutely been successful in extending the address lines by using GPIO. Here was a good discussion we had earlier: https://community.ti.com/forums/t/78.aspx It started out discussing the flash programming, but later got into using the AIS boot mode. I recommend using the AIS bootmode...
    on Oct 7, 2008

  • Forum Post: Re: C6727 : boot from prallel flash

    Brad Griffis
    TI has already written a secondary bootloader for these devices. That bootloader is permanently programmed into ROM on every c672x device TI ships. So although you have the option of writing your own secondary bootloader, I recommend you use the bootloader that's already built into the device. ...
    on Oct 8, 2008

  • Forum Post: Re: c6727 SPI slave boot mode problem

    TimHarron
    Harbour I think that it is time consuming and silly thing to investigate boot protocol of the leading TI DSP with zero documentation and useless support replies. You have to read http://daycounter.com/LabBook/TMS320/C6722_Tutorial.phtml - it is bright example of using your products. At he end of the...
    on Oct 16, 2008

  • Forum Post: Re: c6727 SWS HPI boot problem

    TimHarron
    Start-Word Synchronization is a part of the Application Image Script (AIS), but because the UHPI boot does not utilize AIS it does not require a SWS. The UHPI peripheral is unique compared to the other peripherals in that it is a DSP slave peripheral that grants the host access to the entire memory map...
    on Dec 11, 2008

  • Forum Post: CSL c672x document is not enough.

    hiro10784
    I'm tried to use dMAX function with CSL 672x(ver03.00.09) but there is some problem. for example, CSL_dmaxOpen() function has CSL_DmaxObj structure argument, but not described detail in the csl document . SHOULD MAKE ANALYZE CSL SOURCE ? ha.....
    on Apr 21, 2009

  • Forum Post: controlling C6727B wait state

    rsp
    We are using C6727B DSP and using Code Composer Studio with an emulator for debugging. In the GEL file. we are setting the following registers 1. A1CR = 0x3FFFFFFD (16-Bit Data Access) 2. AWCCR = 0x10000080 (Default Value) We are not presently using EM_WAIT signal. The EM_CS2 signal pulses for...
    on May 25, 2009

  • Forum Post: Re: controlling C6727B wait state

    BrandonAzbell
    I would say your long EM_CS2 pulses probably have more to do with the A1CR register considering you have configured the Extended Wait to be disabled by setting bit 30 (EW) of A1CR to 0. The bit fields of the A1CR are specified in Section 3.5 of the TMS320C672x DSP External Memory Interface (EMIF) User's...
    on May 25, 2009

  • Forum Post: Can the PADK-professional audio developement kit be Debugged through USB?

    manferd
    I've been loading programs onto the PADK by: 1) Compile the project in Code Composer Studio v3.3 with the target configuration set to the c672x simulator 2) Use the command prompt to run the command (Provided with the PADK) "makerom.exe loader.out <programName>.out" to make a...
    on Oct 12, 2009

  • Forum Post: How do I setup the GPIO pins and where are they physically on the PADK c6727?

    manferd
    I've been trying to write a simple program for the PADK Professional Audio Development Kit C6727 DSP that will turn on/off an LED using the HAS pin setup as a GPIO pin according to the state of one of the push buttons, but I can't seem to get it right. Here is what I have: CSL_UhpiHandle hUhpi...
    on Oct 19, 2009

  • Forum Post: TMS320 C672x questions from a beginner.

    MegaDocent
    Hello! I am a beginner developer. Though I plan to be engaged in it further, it is my first experience in the field. Now i work with TMS320 C672x (sprs370e) I read many appnotes and other useful info, but i don't understand some things. I am unsure about right understanding some things. My problem...
    on Feb 16, 2010

  • Forum Post: How to use SPI slave bootloader in TMS320C672x?

    Pan Kim
    Hi, By SPRAA69D there have several boot modes for TMS320C672x. But on SPRZ232F, it mentes out that I2C mode is not always function correctly and SPI master boot mode is not recommended too. So, the boot mode is just of HPI, Parallel Flash and SPI Salve. I use TMS320C6720 as development evaluation, the...
    on Jul 13, 2010
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