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McBSP
Related Posts

  • Forum Post: Re: BIOS, Port Configuration

    TimHarron
    Hi Tung, BIOS is just an operating system (in truth, a scheduler) that manages the software activity on the DSP. While this may be nitpicky, we don't "use BIOS" to output data on the DSK's J3 header. The McBSP initialization found in the McBSP Reference Guide is the most accurate routine...
    on Jul 16, 2008

  • Forum Post: Re: BIOS, Port Configuration

    Brad Griffis
    Don't forget to use "volatile" keyword! *(( volatile unsigned short int*)0x90080006) |= 1;
    on Jul 17, 2008

  • Forum Post: Re: BIOS, Port Configuration -McBSP0 has no output

    Brad Griffis
    I looked at the Technical Reference Manual for the 6416 DSK and it shows that only McBSP1 and McBSP2 are used to talk to the codec and therefore those are the only ones where Tim's earlier comments about rerouting through the memory mapped CPLD register would be relevant. McBSP0's routing is...
    on Aug 28, 2008

  • Forum Post: McBSP Interrupt configuration for TMS320c6414T ,extarnal Frame sync for receiving and transmitting

    dspguy_78
    Hi All, Currently I am working on the DSP TMS320C6414T , configuring McBSP serial interrupts to CPU (not using EDMA purposely ). MCBSP 0 having interrupts as following Intr 5 => McBSP0 Transmit == > transmit data to Backplane (exchange interface) Intr 6 => McBSP0 Receive == > receive...
    on Mar 13, 2009

  • Forum Post: PSP McBSP Driver for C6424

    Umberto Amadei
    I am trying to import in my C6424 project the PSP McBSP driver, but the only example provided by PSP is customized for audio application with AIC33 such as in the EVM. My application is not an audio application and so I have some difficulties in order to use the driver. Where could I find a general...
    on Apr 14, 2009

  • Forum Post: Re: PSP McBSP Driver for C6424

    Umberto Amadei
    Gagan, I didn't use the PSP McBSP driver. I tried to remove from the PSP Audio driver and example (associated with McBSP driver) the part related to AIC33 configuration through I2C, but I had a lot of problems when I reduced the number of word in the frame (EDMA interrupt: BUFLEN parameter in audio_sample...
    on May 21, 2009

  • Forum Post: Re: PSP McBSP Driver for C6424

    Umberto Amadei
    Gagan, I am sorry for the delay in my answer. Now I am very busy in other activities, but as soon as I'll be free, I'll try to use your driver. Thank you very much for your help. Umberto Amadei
    on May 26, 2009

  • Forum Post: Re: 6455 SPI/MCBSP configuration problem

    jiefu zhou
    I have the same problem with Brady. I configure the related register as spra487, from the DXR register, the XEMPTY and XRDY bits in SPCR register, it seems the data have been send out, however, no clk could be detected at clk. I also tried the example Mariana gived, there is no clk output too. ...
    on Aug 23, 2009

  • Forum Post: Problem when using SPI at C6455

    jiefu zhou
    I have met problem when using SPI at C6455, the configuration is based on SPRU580G and SPRA487,there is no outout at the signal CLK and DataOut of SPI, I have noticed there was the same problem at the forum link: http://e2e.ti.com/forums/t/5359.aspx The problem is almost same with Brady, the data in...
    on Aug 23, 2009

  • Forum Post: Interfacing the TMS320C6713DSK and the ADS8364EVM Converter Daughter Card

    Bendous
    Hello, I am very new to DSP hardware. I am trying to sample an analogue signal and store it on a computer. I am using the ADS8364EVM to do Analog-2-Digital conversion and the C6713DSK to process the signal and store it on the PC. I have been reading on the two boards and trying to get a hang of...
    on Aug 26, 2009

  • Forum Post: Setting the CLKR1 pin high?

    Bendous
    Hello, Does anyone know how to set the CLKR1 pin on the peripheral extension connector (J3) to be high??? Any help will be very much appreciated.
    on Sep 21, 2009

  • Forum Post: McBSO SPI question for C6713 DSK

    Bendous
    Hello everyone, I am using McBSP0 on the C6713 to drive an SPI DAC (TI's DAC8501). I noticed that if I do the following: while(!MCBSP_xrdy(DAC_McBSP_Handle)); MCBSP_write(DAC_McBSP_Handle, 0x2222); while(1); The McBSP keeps writing the value out repeatedly. Is is supposed to do this? or...
    on Oct 21, 2009

  • Forum Post: Re: McBSO SPI question for C6713 DSK

    BrandonAzbell
    This is what is classified as a Transmit Underflow condition which is described in Section 5.5.4 of the TMS320C6000 DSP Multichannel Buffered Serial Port (McBSP) Reference Guide ( SPRU580 ). During underflow condition, the transmitter continues to transmit the old data in DXR for every new frame...
    on Oct 21, 2009

  • Forum Post: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    We have an issue with EDMA - McBSP linkage and execution. Please refer the document placed here for the detailed explanation of the issue and interface diagram. http://e2e.ti.com/members/157882/files/EDMA_2D00_McBSP-Issue.docx.aspx In summary, the data originated in one DSP is received corrupted...
    on Dec 7, 2009

  • Forum Post: Re: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    Source Code updated here.. http://e2e.ti.com/members/157882/files/Src-Code.zip.aspx
    on Dec 7, 2009

  • Forum Post: Re: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    Brad, Any problem on McBSP comm lines can lead to this kind of issue? any suggestions to overcome this problem?
    on Dec 8, 2009

  • Forum Post: Re: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    Another point to be mentioned here is, the corruption happens with only one slave dsp. It happens with the slave dsp which is occupying first half of the frame. Corruption pattern Good packet 26 00 26 00 26 00 26 00 26 00 26 00 29 1C 74 Bad packet following this good packet. 27 00 27 00 26...
    on Dec 8, 2009

  • Forum Post: Re: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    Uploaded Master DSP EDMA ISR related code also .. http://e2e.ti.com/members/157882/files/default.aspx
    on Dec 9, 2009

  • Forum Post: Re: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    Brad, I didn't see any boundary alignment.
    on Dec 9, 2009

  • Forum Post: Re: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    Brad, That was additional code added as trial to overcome this premature edma interrupts issue. See another test result here I removed that part of the code and made exactly as below... interrupt void edma_ISR() { /* change the ping pong buffer */ if (*((volatile unsigned int *) (EVENTC_PARAMS...
    on Dec 9, 2009

  • Forum Post: Re: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    I did another test with following code in EDMA ISR to see if the loading buffer corrupted. interrupt void EDMA_isr() { if (available_xmit_buf == 1) available_xmit_buf = 0; else available_xmit_buf = 1; mcbsp0_xmit_complete = 1; memcpy(&mcbsp_xmit_buffer[available_xmit_buf], &dcload[available_data_buf...
    on Dec 10, 2009

  • Forum Post: Re: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    I will definitely give a try, assigning different TCC for each PING/PONG transfer if thats doable. I just wanted to know, with the configuration we made is there any possibility that the EDMA interrupt is generated for reasons other than transmit complete. (Source code, which has the details of EDMA...
    on Dec 11, 2009

  • Forum Post: Re: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    Frame sync is spaced at 103micro seconds. And DSP A has to send 15bytes after frame sync. Means EDMA interrupt is expected to happen after 46micro from Frame sync. After that it has 57micro seconds of time left for another frame sync to come. So till then the SRC should not change. I dont see anything...
    on Dec 11, 2009

  • Forum Post: Re: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    Your suggestion, to check for >= instead of == for SRC(on slave DSP) and DST(on master DSP), seems to be bringing the corruption errors to zero. In a continuous run of one hour, there is not even a single packet corrupted. The modification done for both Source and Main DSPs EDMA ISRs for SRC and DST...
    on Dec 11, 2009

  • Forum Post: Re: EDMA-McBSP Packet corruption

    Bhaskar Reddy
    Ignore about packet loss. The code was not resetting packet loss counter. Packet loss count during startup seems to remain there. Thanks Brad.
    on Dec 11, 2009
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