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In addtion, the customer is using

x-loader-03.00.02.07

>  uboot: VERSION = 2010, PATCHLEVEL = 06, SUBLEVEL = ,EXTRAVERSION =

>  kernel: 2.6.32

And the log when kernel crashes is as below:

5415.crash.log

And they also tried to change DDR bus clock from 200MHz to 133MHz, but it turned out the same problem.

In addition, their configuration is refer to

http://processors.wiki.ti.com/index.php/Setting_up_AM37x_SDRC_register

And their bootargs is as below:

bootargs=console=ttyS0,115200n8 androidboot.console=ttyS0

mem=68M@0x80000000 mem=384M@0x88000000 mpurate=1000 omap_vout.vid1_static_vrfb_alloc=y omap_vout.vid2_static_vrfb_alloc=y

init=/init ubi.mtd=5 initrd=0x83000000,0x500000 root=/dev/ram ro

And cmemk configuration in kernel:

insmod /system/ti-dsp/cmemk.ko "phys_start=0x84700000

phys_end=0x85900000 allowOverlap=1 useHeapIfPoolUnavailable=1"

And memory for DSP:  0x84700000~0x85900000

Hi Vivian,

So, to summarize

The customer is trying MICRON MCP NAND 4Gb+LPDDR4Gb combination for DM3730

Kernel is crashing when the second 2GB piece connected to CS1, no issues when first 2GB piece is connected to CS0.

The kernel is crashing at different memory related points.

The kernel+android code is based on latest rowboat-gingerbread-dsp.xml.

I have some queries

Why 2GB pieces are connected to DM3730. Are you trying to configure each for 256MB and get 512MB RAM?

Did you try with no-dsp images?

To start simple (remove dsp components), Can you run the images from http://software-dl.ti.com/dsps/dsps_public_sw/sdo_tii/TI_Android_DevKit/TI_Android_GingerBread_2_3_DevKit_1_0/exports/AM37X.tar.gz with the modified x-loader and u-boot for 512MB modification.

The corresponding sources will be at http://software-dl.ti.com/dsps/dsps_public_sw/sdo_tii/TI_Android_DevKit/TI_Android_GingerBread_2_3_DevKit_1_0/exports/TI_Android_GingerBread_2_3_DevKit_1_0.tar.gz

512M LPDDR

Hi Arun,

Thanks for reply.

The images from http://software-dl.ti.com/dsps/dsps_public_sw/sdo_tii/TI_Android_DevKit/TI_Android_GingerBread_2_3_DevKit_1_0/exports/AM37X.tar.gz can't be runned in my board!

I modify x-loader and u-boot,  and configure CS0/1 the same parameters of MICRON given by Vivian.

What strange is that kernel is crashing only at one 2GB piece connected to ether CS1 or CS0.

I do other test :

1. configure SDRC_MCFG_p[17:8] RAMSIZE to zero of ether CS0 or CS1.

2. run kernel with busybox and without android, and use 256M memory which start address is 0x80000000.

3. read sdcard and usb and nand flash of a same big file(aboud 100M) in them, then compare the data.

4. I found almost times the data is different when run in one CS,  but another one CS is ok.

Hi Lin,

If I understand the problem correctly

1. If SDRC_MCFG_p[17:8] RAMSIZE to 2Gb for CS1 :- Crashes are observed

2. If SDRC_MCFG_p[17:8] RAMSIZE to zero for CS1 :- Crashes are not seen

a) Could you do memtest utilities at the uboot prompt ?

b) Also check this wiki for recommended SDRC settings

http://processors.wiki.ti.com/index.php/Setting_up_OMAP35x_SDRC_registers

c) I assume you have same values for SDRC registers for CS0 and CS1

Lin,

I see these values in your configuration

> SDRC_MCFG_0       : 03588099

> SDRC_MCFG_1       : 03588099

What is  the configuration of your memory for CS0 and CS1?\

Is it (64M x 32) for both ?

Hi Lin,

Can you please post the x-loader - u-boot log? Does it print DRAM: 512MiB ?

If not,

Can you please try this patch on u-boot and see if you are able to boot with 512M

Patch on U-boot

diff --git a/arch/arm/cpu/arm_cortexa8/omap3/sdrc.c b/arch/arm/cpu/arm_cortexa8/omap3/sdrc.c
index b0048d5..bafebcd 100644
--- a/arch/arm/cpu/arm_cortexa8/omap3/sdrc.c
+++ b/arch/arm/cpu/arm_cortexa8/omap3/sdrc.c
@@ -181,7 +181,7 @@ int dram_init(void)
         * memory on CS0.
         */
        if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) {
-               do_sdrc_init(CS1, NOT_EARLY);
+               /*do_sdrc_init(CS1, NOT_EARLY);*/
                make_cs1_contiguous();
 
                size1 = get_sdr_cs_size(CS1);

Hi Arun,

  Follow is the x-loader and uboot log only running with CS1.

Texas Instruments X-Loader 1.47 (Apr  9 2012 - 17:12:35)
cpu version : 2, mem type : 1
Starting X-loader on MMC

 MMC init failed
Booting from nand . . .
Starting OS Bootloader...


U-Boot 2010.06-svn (Apr 18 2012 - 08:42:06)

SDRC_DLLA_CTRL:0000000a
CONTROL_PROG_IO0:00000000
SDRC_POWER_REG:00000081
SDRC_MCFG0    : 03580091
SDRC_MCFG1    : 03588091
SDRC_ACTIM_CTRLA_0:6a5944c5
SDRC_ACTIM_CTRLA_1:6a5944c5
CM_CLKSEL1_PLL:08c80c00
OMAP34XX_CONTROL_ID:2b89102f
SDRC_RFR_CTRL_0:0005e601
SDRC_RFR_CTRL_1:0005e601
OMAP34xx/35xx-GP ES2.1, CPU-OPP2 L3-165MHz
OMAP3 EVM board + LPDDR/NAND
I2C:   ready
DRAM:  256 MiB
program run addr is : 0x80e829ac
NAND:  NAND device: Manufacturer ID: 0x2c, Chip ID: 0xbc (Micron NAND 512MiB 1,8V 16-bit)
512 MiB
HW ECC selected
In:    serial
Out:   serial
Err:   serial
Read back SMSC id 0x93110000
Die ID #0e1000029e38000001682ff11800700d
Net:   smc911x-0
Hit any key to stop autoboot:  0

the difference that run with CS0 or both CS0/1 only SDRC_MCFG_p[17:8] RAMSIZE.

MICRON MCP NAND 4Gb+LPDDR4Gb memory is consist of two die 64Mx32.

I had already comment the line in uboot before and also comment the RFR register configure in kernel.

-               do_sdrc_init(CS1, NOT_EARLY);
+               /*do_sdrc_init(CS1, NOT_EARLY);*/

I print the SDRC register in a module of kernel and uboot, the value is same to the configure in x-loader.

I had refer to http://processors.wiki.ti.com/index.php/Setting_up_OMAP35x_SDRC_registers, but the problem is always.

I am testing other paramters, but it doesn't make any effect.

I try to reduced the memory frequency to 100MHz, the issue almost disappears. but the NAND and Network don't work normal.

--- board/omap3evm/platform.S 
+++ board/omap3evm/platform.S  
@@ -454,7 +454,7 @@
 .word 200, 12, 0, 1
 .word 200, 12, 0, 1
 .word 200, 12, 0, 1
-.word 200, 12, 0, 1
+.word 100, 12, 0, 1
 
 per_36x_dpll_param:
 /*    SYSCLK     M      N      M2      M3      M4     M5      M6      m2DIV */

Hi Aru,

   I did memtest utilities in uboot,  but can not checkout the problem.

I try to open MMU, DCache and ICache in uboot,  then burst read/write memory,  But it is ok.

Ony running in kernel,  the problem can appear.

Hi Lin,

To understand the current scenario better, can you confirm my understanding

1) If Only CS1 is connected, then kernel crashes

2) If both CS0 & CS2 are connected, then no issues

3) If Only CS0 is connected, then no issues.

Hi Arun

      Please forgive my bad English! 

1) If Only CS1 is connected, then kernel crashes

2) If Only CS0 is connected, then no issues

3) If both CS0 & CS1 are connected, then kernel crashes

We had reversed the CS0 and CS1 line on the board, the result is follow the memory die.

1) If Only CS0 is connected, then kernel crashes

2) If Only CS1 is connected, then no issues

3) If both CS0 & CS1 are connected, then kernel crashes

Hi Lin,

Can you compare your x-loader & u-boot with the following sources + patch

x-loader repository http://gitorious.org/rowboat/x-loader Branch OMAPPSP_04.02.00.07

u-boot repository http://gitorious.org/rowboat/u-boot  Branch OMAPPSP_04.02.00.07

Patch on U-boot

diff --git a/arch/arm/cpu/arm_cortexa8/omap3/sdrc.c b/arch/arm/cpu/arm_cortexa8/omap3/sdrc.c
index b0048d5..bafebcd 100644
--- a/arch/arm/cpu/arm_cortexa8/omap3/sdrc.c
+++ b/arch/arm/cpu/arm_cortexa8/omap3/sdrc.c
@@ -181,7 +181,7 @@ int dram_init(void)
         * memory on CS0.
         */
        if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) {
-               do_sdrc_init(CS1, NOT_EARLY);
+               /*do_sdrc_init(CS1, NOT_EARLY);*/
                make_cs1_contiguous();
 
                size1 = get_sdr_cs_size(CS1);

These [sources + patch] support BeagleBoard XM revisions A to C with 512MB ram with the same Micron memory with same 64Mx32 configuration (same as yours). I would recommend to use the same SDRC register settings as BeagleBoard XM.

Build configuration  for x-loader for beagleboard omap3beagle_config

Build configuration  for x-loader for beagleboard omap3_beagle_config

Hi：

bai lin

I have the same problems .(DM3730CUS + Micron 512M LPDDR with 512M nand)

Is the problem was fixed now?

Thanks.

I believe that I can't solve this problem. So I don't use the die(Micron 512M LPDDR with 512M nand), and switch to Hynic MCP(512M RAM+NAND).

As you known, it does't have this problem.

Thank you very much...